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SR Flip Flop with NOR gate Submitted to : Prof DR. Arooj Khan Submitted by : Hadia Tanveer Roll no: MCSM-S Class : MCS 1A.

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Presentation on theme: "SR Flip Flop with NOR gate Submitted to : Prof DR. Arooj Khan Submitted by : Hadia Tanveer Roll no: MCSM-S Class : MCS 1A."— Presentation transcript:

1 SR Flip Flop with NOR gate Submitted to : Prof DR. Arooj Khan Submitted by : Hadia Tanveer Roll no: MCSM-S22-002 Class : MCS 1A

2 INTRODUCTION : SR Flip Flop is one of the fundamental parts of the sequential circuit. SR is a digital circuit and binary data of a single bit is being stored by it. Flip-Flop are synchronous bistable devices, also known as bistable multivibrators. In this case, the term synchronous means that the output changes state only at specified point (leading or trailing edge) on the triggering input called the clock(CLK), which is designated as a control input, C; that is change in the output occur in synchronization with the clock.

3 Circuit Diagram:

4 Block Diagram :

5 Symbol :

6 Truth table :

7 K Mapping : Equation Qn+1 = S+QnR’

8

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