1. Welcome to 4 th Session of MPMC 23-06-2020 at 3.00am

2. EE8551- Microprocessor and Microcontroller V- Semester EEE Mr. Hariharan N M.E. Assistant Professor Department of Electrical and Electronics Engineering R M K College of Engineering and Technology

3. EE8551- Microprocessor and Microcontroller Unit –I 8085 PROCESSOR – Memory Interfacing

4. 8085 Microprocessor - Architecture

6. 8 bit internal bus Interrupt Controller TRAP RST 7.5 RST 6.5RST 5.5INTR Interrupt: It means interrupting the normal execution of the microprocessor. When microprocessor receives interrupt signal, it discontinues whatever it was executing. It starts executing new program indicated by the interrupt signal. Interrupt signals are generated by external peripheral devices. After execution of the new program, microprocessor goes back to the previous program.

7. 8 bit internal bus Serial I/O Control SID SOD Serial communication Signal SID - Serial Input Data Line: The data on this line is loaded into accumulator bit 7 whenever a RIM instruction is executed SOD – Serial Output Data Line: The SIM instruction loads the value of bit 7 of the accumulator into SOD latch if bit 6 (SOE) of the accumulator is 1.

8. What is an Interface Pins of 8085 used in Interfacing Memory – Microprocessor Interface I/O – Microprocessor Interface

9. What is an Interface Interface is the path for communication between two components. Interfacing is of two types, memory interfacing and I/O interfacing. Memory Interfacing  When we are executing any instruction, we need the microprocessor to access the memory for reading instruction codes and the data stored in the memory. For this, both the memory and the microprocessor requires some signals to read from and write to registers. IO Interfacing  There are various communication devices like the keyboard, mouse, printer, etc. So, we need to interface the keyboard and other devices with the microprocessor by using latches and buffers. This type of interfacing is known as I/O interfacing.

10. Example Block Diagram 8085 Memory Address Lines Data Lines Control Lines Interface

11. 8085 Interfacing Pins 8085 Higher Address Bus ALE READY A 15 – A 8 AD 7 – AD 0 Lower Address/Data Bus

12. Address Bus of 8085 Address Bus – Used to address memory & I/O devices – 8085 has a 16-bit address bus A 15 A 14 A 13 A 12 A 11 A 10 A9A9 A8A8 AD 7 AD 6 AD 5 AD 4 AD 3 AD 2 AD 1 AD 0 Lower-order AddressHigher-order Address Data Bus Used to transfer instructions and data 8085 has a 8-bit data bus Data Bus

13. Higher Order Address Bus The higher order address bus is a unidirectinal bus. It carries most significant 8-bits of a 16-bit address of memory or I/O device. Address remains on lines as long operation is not completed.

14. Lower Order Address/Data Bus This bus is bidirectional and works on time division multiplexing between address and data. During first clock cycle, it serves as a least significant 8-bits of memory/ IO address. For second and third clock cycles it acts as data bus and carries data.

15. Demultiplexing Address/Data Lines 8085 identifies a memory location with its 16 address lines, (AD0 to AD7) & (A8 to A15) 8085 performs data transfer using its data lines, AD0 to AD7 Lower order address bus & Data bus are multiplexed on same lines i.e. AD0 to AD7. Demultiplexing refers to separating Address & Data signals for read/write operations.

16. How Data Is Read from Memory … 8085 Memory 20H 05H 2005H A 15 – A 8 AD 7 – AD 0 4FH 2005H

20. MemoryAddress 0000h 0001h 000Fh 0002h 0010h 2000h 2001h FFFEh FFFFh 8 bit data 1A 2A 3C A1 B2 C3 1A 2A 3C A1 B2 C3 3C XX FE BE 16 bit Address Data Address

21. Basic Concepts in Memory Interfacing: For Memory Interfacing in 8085, following important points are to be kept in mind 1.Microprocessor 8085 can access 64Kbytes memory since address bus is 16-bit. But it is not always necessary to use full 64Kbytes address space. The total memory size depends upon the application. 2.Generally EPROM (or EPROMs) is used as a program memory and RAM (or RAMs) as a data memory. When both, EPROM and RAM are used, the total address space 64Kbytes is shared by them. 3.The capacity of program memory and data memory depends on the application. 4.It is not always necessary to select 1 EPROM and 1 RAM. We can have multiple EPROMs and multiple RAMs as per the requirement of application. 5.We can place EPROM/RAM anywhere in full 64 Kbytes address space. But program memory (EPROM) should be located from address 0000H since reset address of 8085 microprocessor is 0000H. 6.It is not always necessary to locate EPROM and RAM in consecutive memory For example : If the mapping of EPROM is from 0000H to OFFFH, it is not must to locate RAM from 1000H. We can locate it anywhere between 1000H and FFFFH. Where to locate memory component totally depends on the application.

22. 64kb Memory interfacing with 8085 Processor 8085 64KB EPROM 8 bit latch AD0 – AD7 ALE A8 – A15 A0 – A7 A0 – A15 D0 – D7 EN A0 – A15 O0 –O7

24. Binary Address A15 A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0 64kb Memory interfacing with 8085 Processor and Address Decoding Device Hex Address EPROM 0000h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001h1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 11 1 0 7FFFh 1 8000h 1 1 1 1 1 1 1 1 1 1 1 11 1 1 1 0 1 1 1 1 1 1 1 1 1 1 11 1 1 1 1 0 1 1 1 1 1 1 1 1 1 11 1 1 1 0 0 1 1 1 1 1 1 1 1 1 11 1 1 1 FFFFh FFFEh FFFDh FFFCh

25. 64kb Memory interfacing with 8085 Processor 8085 32KB EPROM 8 bit latch AD0 – AD7 ALE A8 – A15 A0 – A7 A0 – A15 D0 – D7 EN A0 – A14 O0 –O7 32KB RAM A0 – A14 O0 –O7 15

26. 64kb Memory interfacing with 8085 Processor 8085 32KB EPROM 8 bit latch AD0 – AD7 ALE A8 – A15 A0 – A7 A0 – A15 D0 – D7 EN A0 – A14 O0 –O7 32KB RAM A0 – A14 O0 –O7 15 A15

27. Binary Address A15 A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0 64kb Memory interfacing with 8085 Processor and Address Decoding Device Hex Address EPROM RAM 0000h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 0001h1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 x 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 x 0FFFh 7FFEh 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 0000h 0001h 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 x 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 x 7FFFh 7FFEh Selection lines –

28. Dec.Addr Binary Address A15 A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0 64kb Memory interfacing with 8085 Processor and Address Decoding Device Hex Address EPROM RAM 0000h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001h1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 7FFFh 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 8000h 8001h 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFFh FFFEh Selection lines – A15

29. How to Calculate address for Memory 8085 Address line = 16 2^n=number of memory locations. Where, n = number of address lines 2^16 = 65536 = 65536-1 =65535 (decimal) =FFFF(hexadecimal)

30. How to Calculate address for Memory

31. 0 0 Interface 8kb & 16kb ROM and 8KbRAM and 16kbRAM Memory with 8085 Processor 8085 8KB EPROM 8 bit latch AD0 – AD7 ALE A8 – A15 A0 – A7 A0 – A15 D0 – D7 EN A0 – A12 O0 –O7 16KB RAM A0 – A13 O0 –O7 13 14 8KB RAM A0 – A12 O0 –O7 13 16KB EPROM A0 – A13 O0 –O7 14 2 X 4 decoder EN B A Y1 Y0 Y3 Y2 2 A15 A14 A14, A15

32. Dec.Addr Binary Address A15 A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0 Device Hex Address 0000h 0 0 0 0 0 0 0 0 0 0 0 0 0 X 0 0 1FFFh 7FFFh 4000h 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 0 1 9FFFh C000h 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X 0 1 FFFFh 8000h EPROM I 8KB EPROM 2 16KB RAM 2 16KB RAM 2 8KB 1 1 1 1 1 1 1 1 1 1 1 1 1 X 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0

33. Unused address – 2000h to 3FFFh – A000h to BFFFh Future extension address

34. Assignment Question 1.Consider a system in which 32kb memory space is implemented using four numbers of 8kb memory. Interface the EPROM and RAM with 8085 processor. 2. Consider a system in which the 64kb memory space is implemented using eight numbers of 8kb memory. Interface the EPROM and RAM with 8085 processor