1. Final Exam Review
CSE 241
B.Ramamurthy
8/4/2019
B.Ramamurthy

2. Place and Time Date: 5/9/2012 Time: 8.00 – 11.00 AM Place: 121 Cooke
Please bring
Pencils, pens and erasers.
Closed book exam
No calculators allowed
8/4/2019
B.Ramamurthy

3. Topics Chapter 3: Sequential circuit design
Section 3.4
FFs: D, T, JK FF: characteristic and excitation tables
Design of a sequential circuit
Analysis of sequential circuit
Chapter 4: Hardware description language (Verilog) P ,
Given a logic circuit obtain the Verilog description
Given a Verilog description obtain the logic circuit
8/4/2019
B.Ramamurthy

4. Topics (contd.) Chapter 5: Number system – p.250-251
Floating point number IEEE 754 format
Given a decimal number represent it in FP in IEEE 754
Chapter 5: MSI circuit: MUX and Decoders: combinational using MUX and decoders
Chapter 6: Assembly language
Given an assembly language, say what it does
Given a high level language code write the assembly language equivalent
8/4/2019
B.Ramamurthy

5. Format 1 Combinational circuit using decoder and MUX
2 questions in sequential circuits
Sequential circuit analysis (from FF circuit to state diagram)
Sequential circuit synthesis using FF (From state diagram to FF circuit)
1 question in FP representation
Given a decimal number, represent it in IEEE 754
1 question in Verilog design
Given a state diagram, synthesize using Verilog (behavioral)
1 question in MIPS assembly language
8/4/2019
B.Ramamurthy

6. Remember.. Learn from the home works assigned
Find ways to efficiently answer questions
Find ways to not make silly mistakes
Create a mental checklist to make sure you have not missed anything important on the exam (like your name of the exam paper!)
Read the question paper and strategize on the order in which you will answer the questions
Come prepared: there is no substitute for hard work.
8/4/2019
B.Ramamurthy