1. Chapter 4: Computer Architecture
COM233 Spring 2012

2. CPU has 6 special locations called registers
4 – bit status register NZVC
16 – bit accumulator (A)
16 – bit index register (X)
16 – bit program counter (PC)
16 – bit stack pointer (SP)
24 – bit instruction register (IR)

3. Data and Control Input Device Main Memory Output Device
Central Processing Unit
Main Memory
Output Device
Bus

4. 0002
0000
0001
0003
0004
0005
Main Memory

5. Memory address and content
0000 1
0003
0004
0007
000A

6. Pep Input
Pep input comes from either a file or the keyboard, not both at the same time
Must specify input source before executing a program
For a GUI simulator, input comes from a field

7. Pep output
Pep output goes to either a file or the screen, not both at the same time
Must specify output source before executing a program. Need to give file name when output goes to a file
For a GUI simulator, output goes to a new window that can be saved into a file

8. Data and Control Input Device Main Memory Output Device
Central Processing Unit
Main Memory
Output Device
Bus

9. Instruction format Unique, wired into the CPU
Instructions are different for different computers
The Pep/8 has 39 instructions (Fig 4.6) on your textbook
Each instruction contains an instruction specifier (or opcode).
Some instruction have operand specifier following instruction specifier.
Unary instructions are one byte long and do not have operand specifier

10. nonuniary instruction
Instruction specifier
Operand specifier
uniary instruction
Instruction specifier
Instructions

11. Addressing modes Addressing mode aaa Immediate 000 Direct 001 Indirect
010
Stack relative
011
Stack relative deferred
100
Indexed
101
Stack-indexed
110
Stack-indexed deferred
111
The addressing aaa field

12. Prep/8 Instruction identifier fields
Addressing mode a
immediate
ìndexed 1
The addressing-a field
Register r
Accumulator, A
Index register, X 1
The register-r field

13. Examples of nonunary & unary instructions
01A A A5
01A6
Opcode r a a a Operand specifier
The above two instructions in binary form are called machine language
The instructions in hexadecimal preceded by their memory addresses
01A3 8D034E
01A6 1E

14. Direct Addressing Mode
aaa = 001 indicates direct addressing
Operand specifier is the address of the operand
Operand = Mem [Operand Specifier]
Instruction  instruction-specifier||operand specifier

15. Example instructions
The stop instruction has instruction specifier
The load instruction has instruction specifier 1100 raaa.
It load a word (two bytes) into the (A) or (X) depending on r.
The status bits N & Z are affected.
R  operand; N  r<0; Z  r = 0

16. Example 4.4
Executed the instruction C1004A

17. Computer Architecture
Week Number 11
Direct Addressing
Eltayeb Abuelyaman

18. Example instructions R ← Oprnd; N ← r <0; Z ← r=0
The stop instruction has instruction specifier
The load instruction has instruction specifier 1100 raaa.
It load a word (two bytes) into the (A) or (X) depending on r.
The status bits N & Z are affectedز
R ← Oprnd; N ← r <0; Z ← r=0

19. Example 4.4 Executed the instruction C1004A Solution C 1 0 0 4 A
Opcode raaa Operand specifier