1. VATA-GP5 block diagram fast gain shaper discr. monostable trigger out
silicon diode
thr
150 ns
preamp
slow
S&H
shaper
128 channels
readout logic (serial or sparse)
silicon diode V
thr
differential
hold
analog out

2. VATA-GP5 Principle of serial readout
fast shaper
discr. OR
VFP
FOR
Trigger
mask
tresh.
Det.
S/H
Analog
Out
slow
shaper

3. VATA-GP5 Principle of sparse readout1
FOR
128
Register 1
Analog Out
Channel address
Look Up
Table
Data lock 7

6. Experimental set-up for VATA-GP5 tests with photoeelectrons
VME
DAQ
Readout card
CsI photctahode (300 nm)
Deposited on a grid
(Au, 80% transparency)
Si sensor (300 mm)
208 pads (4×4 mm2)
photo-
electrons
mask (at ground)
-UPC = kV
UV H2 flash lamp
(self triggering)
vacuum pump (turbo)
P < 10-5 mbar
CaF2
MgF2
mirror
MgF2
collimator

17. Vin versus Uth
(Pulse Gen.)
(fig. 9)

18. Discrimination Curve with lamp LSF: Q(fC) = 2.85 + 0.35 Uth (mV)
Gain HPD = 4 * 103 – LSO crystal bars
Eth ~ 15 Kev
(fig. 14)

19. * Vin
* Vin
(fig. 7)

20. Si Sensor Depletion
(Upc = 15 kV)
(fig. 13)

21. Uth = 20 mV 1.56 fC / ADC count Pad # 205 Npe ~ 575 pad # 213
(fig. 15)

22. 2 2 1 1
Chip 1
Chip 2

23. 2 1

25. FOR Time Walk