1. AIDA design review 12 November 2008 Davide Braga Steve Thomas
ASIC Design Group
12 November 2008

2. preAmplifier bias
In order to improve stability and optimize performance, the following signals can now be selected using an internal reference:
First two stages bias current
Output surce follower bias current
Compensation resistor
Bias signals are buffered (locally in each channel the most critical, globally the rest) to avoid crosstalk
Fast comparator implemented, with baseline following the preamp’s output

3. Layout Maximum effort to: Avoid parasitics inside the single channel
Avoid crosstalk between channels
Reduce power supply impedance

4. Layout preAmplifiers (2 channels) and their feedbacks loops ~50%
shaper completed
x10stage and fast comparator ~50%
peak holds completed
bias block (global block) to be started
Top level checking to follow