1. Day 22: October 23, 2013 Pass Transistor Logic
ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems
Day 22: October 23, 2013
Pass Transistor Logic
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2. Teaser
What does this do?
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3. Previously
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4. Impact of Capacitance
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5. Today Pass Transistor Circuits Cdiff>0
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6. Pass Transistor
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7. Identify Function
What function?
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8. Area
Compare with CMOS circuit?
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9. Output
What is Vout if A=0, B=0?
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10. Output
What is Vout if A=1, B=0, notB=1?
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11. Output What is Vout if A=0.95V, B=0, notB=1?
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12. Output
Is this a restoring gate?
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13. Output What does output look like (DC transfer)?
(B=0, notB=1, sweep A)
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14. Pass TR transfer (B=1) This is misleading. Need to be clear on how
A and notA are driven, and probably look at both.
(and doesn’t match question on previous slide)
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15. CMOS Inverter Transfer
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16. Reasonable Input to CMOS Inverter?
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17. Pass tr xor2 with inv restore
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18. Compare CMOS
Is this a fair comparison?
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19. Required to use? What need to add to make substitutable with CMOS?
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20. Restore Output
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21. Restore Output
Area? (compare to CMOS)
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22. Chain Together
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23. Analyze Stage
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24. Analyze Stage What’s different about this?
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25. Delay B=0, Cdiff=0?
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26. Equivalent RC Circuit
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27. Circuit
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28. Delay B=1, Cdiff=0?
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29. Equivalent RC Circuit
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30. Circuit
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31. Circuit
What’s different about this?
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32. Cdiff>0
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33. Contact/Diffusion Capacitance
Cj – diffusion depletion
Cjsw – sidewall capacitance
LS – length of diffusion LS
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34. Impact of Capacitance
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35. Inverter Delay Delay driving another inverter? Include Cdiff=gCgate
W=1
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36. Delay B=1, Cdiff=gCg?
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37. Equivalent RC Circuit?
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38. Equivalent RC Circuit
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39. Bonus (time permit) What does this do? B A More examples in book.
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40. Idea There are other circuit disciplines
Can use pass transistors for logic
Sometimes gives area or delay win
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41. Admin Project Hopefully done with baseline Spencer office hours today
Get started on design-space exploration and optimization
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