1. Penn ESE370 Fall2014 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 15, 2014 Delay and RC Response

2. Delay is RC Charging Penn ESE370 Fall2014 -- DeHon 2

3. Delay is RC Charging Strategy Understand switch state (zeroth order) Break into stages For each stage –Understand R drive –Understand C load Penn ESE370 Fall2014 -- DeHon 3

4. Today RC Charging RC Step Response What is the C? What is the R? Measuring Delay Penn ESE370 Fall2014 -- DeHon 4

5. 90% Rise Time? Penn ESE370 Fall2014 -- DeHon 5

6. What does response look like? Penn ESE370 Fall2014 -- DeHon 6 about 2ps for 90% rise

7. KCL @ Vmeasure? Current across Resistor? Current into Capacitor? Penn ESE370 Fall2014 -- DeHon 7 Governing Equations? (KCL)

8. Equations Penn ESE370 Fall2014 -- DeHon 8

9. Solve Vmeasure Penn ESE370 Fall2014 -- DeHon 9 What’s Vmeasure?

10. What does look like? Penn ESE370 Fall2014 -- DeHon 10

11. Shape of Curve x e -x 1-e -x 0 0.1 1 2 2.3 Penn ESE370 Fall2014 -- DeHon 11 Fillin on board

12. Shape of Curve x e -x 1-e -x 010 0.10.90.1 11/e = 0.370.66 21/e 2 = 0.140.86 2.30.10.9 Penn ESE370 Fall2014 -- DeHon 12

13. Risetime: 10—90% Penn ESE370 Fall2014 -- DeHon 13 T rise ~= 2.2ps

14. What is C? Penn ESE370 Fall2014 -- DeHon 14

15. Capacitance Wire MOSFET gate Logical Gate Fanout -- Total gate load Penn ESE370 Fall2014 -- DeHon 15

16. First Order Model Switch –Loads input capacitively As dig in, understand: –Origin of capacitance –How can we engineer –Tradeoffs Penn ESE370 Fall2014 -- DeHon 16

17. Logic Gate Input Capacitance Capacitance on –A input? –B input? Penn ESE370 Fall2014 -- DeHon 17

18. Fanout Number of things to which a gate output connects Penn ESE370 Fall2014 -- DeHon 18

19. Fanout in Circuit Output routed to many gate inputs Penn ESE370 Fall2014 -- DeHon 19

20. Fanout in Circuit Maximum fanout? Second? Min? Penn ESE370 Fall2014 -- DeHon 20

21. Lumped Capacitive Load Penn ESE370 Fall2014 -- DeHon 21

22. What is R? Penn ESE370 Fall2014 -- DeHon 22

23. Resistance Wire resistance –Supply to transistor source –Transistor output gate it is driving Transistor equivalent resistance Penn ESE370 Fall2014 -- DeHon 23

24. First Order Model Switch –Resistive driver As dig in, understand: –More sophisticated view –How can we engineer –Tradeoffs Penn ESE370 Fall2014 -- DeHon 24

25. Equivalent Resistance What resistances might transistors contribute? –How many cases? –Assume Ron same all tr, Resistance of each? Penn ESE370 Fall2014 -- DeHon 25

26. Equivalent Resistance What resistances might transistors contribute? Penn ESE370 Fall2014 -- DeHon 26 InputRout 00Ron/2 01Ron 10Ron 112Ron

27. Rise/Fall Rise and Fall time may differ –Why? –What is ratio? Penn ESE370 Fall2014 -- DeHon 27 InputRout 00Ron/2 01Ron 10Ron 112Ron

28. Lumped Resistive Source Penn ESE370 Fall2014 -- DeHon 28 R trnet = parallel and series combination of R tr

29. Measuring Delay Penn ESE370 Fall2014 -- DeHon 29

30. Measuring Gate Delay Next stage starts to switch before first finishes Measure 50%--50% Penn ESE370 Fall2014 -- DeHon 30 67ps 80ps t del = 13ps

31. Characterizing Gate/Technology Delay measure will be –Function of load on gate –Function of input rise time Which, in turn, may be a function of input loading Penn ESE370 Fall2014 -- DeHon 31

32. Delay vs. Risetime Penn ESE370 Fall2014 -- DeHon 32 10ps delay 20ps delay 1ps rise100ps rise (if didn’t know input rise, wouldn’t know what a 13ps delay meant)

33. Characterizing Gate/Technology Delay measure will be –Function of load on gate –Function of input rise time Which, in turn, may be a function of input loading Want to understand typical –At least comparable Penn ESE370 Fall2014 -- DeHon 33

34. Standard Measurement for Characterization Drive with a gate –Not an ideal source –Input rise time typically would see in circuit Measure loaded gate –Typical loading – FO4 Penn ESE370 Fall2014 -- DeHon 34

35. HW3 Recommendation Penn ESE370 Fall2014 -- DeHon 35

36. Measurement for Characterization Drive with a gate –Not an ideal source (how change if drive ideal?) –Input rise time typically would see in circuit Measure loaded gate –Typical loading – FO4 Penn ESE370 Fall2014 -- DeHon 36

37. Measurement for Characterization Drive with a gate –Not an ideal source –Input rise time typically would see in circuit Measure loaded gate –Typical loading – FO4 (how change unloaded?) Penn ESE370 Fall2014 -- DeHon 37

38. Delay is RC Charging Penn ESE370 Fall2014 -- DeHon 38

39. Admin “Normal Week” –3 Lecture Week (all here) Office Hours –Monday – Ron 7pm –Tuesday – Andre 4:15pm –Wednesday – Ron 7pm ngspice –Good to get running on laptop Penn ESE370 Fall2014 -- DeHon 39