1. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/
Semiconductor Device Modeling and Characterization EE5342, Lecture 21 -Sp 2002
Professor Ronald L. Carter
L21 02Apr02

2. Fully biased n-MOS capacitorVG
Channel if VG > VT VS VD
EOx,x> 0 n+
e- e- e- e- e- e- n+
p-substrate
Vsub=VB
Depl Reg
Acceptors y
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3. Flat band with oxide charge (approx. scale)
SiO2
p-Si
+<--Vox-->-
q(Vox)
Ec,Ox
q(ffp-cox)
q(fm-cox) Ex
Eg,ox~8eV
EFm Ec
EFi
EFp
q(VFB) Ev
VFB= VG-VB, when Si bands are flat Ev
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4. MOS energy bands at Si surface for n-channel
Fig 8.10**
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5. Fully biased n- channel VT calc
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6. Q’d,max and xd,max for biased MOS capacitor
Fig 8.11**
|Q’d,max|/q (cm-2)
xd,max (microns)
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7. n-channel VT for VC = VB = 0
Fig 10.20*
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8. Flat-band parameters for p-channel (n-subst)
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9. Fully biased p- channel VT calc
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10. p-channel VT for VC = VB = 0
Fig 10.21*
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11. Differential charges for low and high freq
From Fig 10.27*
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12. Ideal low-freq C-V relationship
Fig 10.25*
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13. Comparison of low and high freq C-V
Fig 10.28*
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14. Effect of Q’ss on the C-V relationship
Fig 10.29*
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15. Conductance of inverted channel
Q’n = - C’Ox(VGC-VT)
n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)
The conductivity sn = (n’s/t) q mn
G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so
I = V/R = dV/dR, dR = dL/(n’sqmnW)
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16. Basic I-V relation for MOS channel
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17. n-channel enhancement MOSFET in ohmic region
0< VT< VG
Channel
VS = 0
0< VD< VDS,sat
EOx,x> 0 n+
e-e- e- e- e- n+
Depl Reg
p-substrate
Acceptors
VB < 0
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18. Conductance of inverted channel
Q’n = - C’Ox(VGC-VT)
n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)
The conductivity sn = (n’s/t) q mn
G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so
I = V/R = dV/dR, dR = dL/(n’sqmnW)
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19. I-V relation for n-MOS (ohmic reg)ID
non-physical
ID,sat
saturated
VDS,sat
VDS
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20. Universal drain characteristicID
VGS=VT+3V
9ID1
ohmic
saturated, VDS>VGS-VT
VGS=VT+2V
4ID1
VGS=VT+1V
ID1
VDS
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21. Characterizing the n-ch MOSFETVD ID D G S B VT
VGS
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22. Low field ohmic characteristics
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23. MOSFET circuit parameters
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24. MOSFET circuit parameters (cont)
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25. Substrate bias effect on VT (body-effect)
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26. Body effect data
Fig 9.9**
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27. References
*Semiconductor Physics and Devices, by Donald A. Neamen, Irwin, Chicago, 1997.
**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986
L21 02Apr02