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metrology in a fast paced society
2013 NCSLI International Workshop and Symposium metrology in a fast paced society July 14-18, Nashville, Tennessee INVESTIGATION ON DIGITAL CONTROL CONCEPTS FOR DYNAMIC APPLICATIONS OF ELECTROMAGNETIC FORCE COMPENSATED BALANCES Hanna Weis ¹ Irina Gushchina ¹ Dr. Arvid Amthor ¹ Dr. Falko Hilbrunner ² Christian Diethold ¹ Prof. Thomas Fröhlich ¹ ¹ Technische Universität Ilmenau, Ilmenau, Germany ² Sartorius Weighing Technology GmbH, Göttingen, Germany
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Outline Introduction State of the art: analog control loop
Improve performance: digital control loops Controller based FPGA based Design of the controller Results Conclusions
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Introduction – How does an EMC load cell work?
1 – Weighing pan 2 – Load suspension 3 – Transmission lever 4 – Coupling member with flexure hinges 5 – Parallel lever system with flexure hinges 6 – Bearing of transmission lever 7 – Position indicator 8 – Electrodynamic actuator
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State of the art: analog control loop
Lever moves: Different areas of photo diodes are shaded → two signals proportional to lighted areas Differential amplifier: transformation to one position proportional signal Fed into controller → controller computes current to compensate lever deflection Current generates Lorentz force acting upon lever Measure current, digitize, convert to mass and display Lever moves: Different areas of photo diodes are shaded → two signals proportional to lighted areas
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Analog control Three goals for the controller design:
Derive mass as fast as possible Smooth and stable mass signal required for high resolution Lever should never touch mechanical stops (leads to nonlinear behavior) Analog controllers: Realization as P, PI, PID or PIDT1 controllers Just few parameters to realize contrary demands Good tradeoff can be found for systems with PT1 or PT2 behavior Optimization potential for systems with high frequency resonances restricted due to limited design degrees of freedom → limited measurement speed
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Increase speed: digital control
Application of EMC load cells for high speed purposes like filling plants → short measurement time and high resolution needed → Improve controller performance Advantage of digital controllers: Not restricted to 3 to 4 parameters Any concept realizable e.g.: State space controllers Observer based approaches Online adjustment of parameters Self learning strategies Implementation and usage of a priori knowledge → Suitable hardware for implementation needed
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Digital control loop Additional hardware needed:
A/D- and D/A-converters Voltage driven current source (provide necessary current) Control system (real-time system): Controller-based FPGA-based
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Controller based real-time system
PXI-Chassis: RT controller: Controller algorithm ADC/DAC module Host PC: Host program PXI-Bus TCP/IP
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Controller based real-time system
Host PC: Hardware: Windows PC Software: Windows User interface realized with GUI Connect and disconnect RT-target Start/stop measurement Set control algorithm and filters Specify sampling frequency, measurement range and channels Display data Real-time Chassis: Hardware: PXI-controller NI PXIe-8102 RT ADC-module NI PXI 6289 (18/16bit) Software: Real-time OS Program deployed as DLL on controller Runs control algorithm Saves data Realizes communication between: Controller and ADC-module Controller and host
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Controller program on RT-target
Distributing thread: Establish connection with host Receive configuration from host Wait for commands from host to: Start / stop →enable / disable other threads Main thread: Runs in a hardware timed loop: Read / write data from / to ADC / DAC Perform controller algorithm Put data to DAC queue Trigger saving and sending thread Wait for next hardware trigger Sending thread: Wait for sending event Copy fraction of data from last iteration to local array Send via TCP Saving thread: Wait for saving event Copy data from last iteration to local array Write data to file
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Realized specifications
Control loop runs with 10 kHz Speed limited by bus latencies transferring single values to / from DAC / ADC Input resolution 18 bit Output resolution 16 bit Problem: Delay of one sample between channels (not solved by manufacturer) → leads to phase distortion Improvement: Realize controller on FPGA (Field Programmable Gate Array)
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FPGA based system PXI-Chassis FPGA: Controller algorithm
ADC/DAC module onboard RT controller: runs host program Display PXI-Bus
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FPGA based real-time system
Advantages of FPGA: Direct interface to ADC and DAC modules → no bus latencies Easy to reconfigure Applied modular system: PXI chassis with PC-based real-time controller (NI PXIe-8102 RT) FPGA-module (NI PXI-7854R) with Virtex-5-LX110 FPGA Several ADC and DAC modules onboard (16 bit each) Very good synchrony of channels, low jitter, high sampling rates (>500 kHz) Host program running on RT controller Implementation on FPGA with soft core LiSARD: realizes floating point processor → realize control algorithm with double precision
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Realized structure Host: Start / Stop measurement Start FPGA
Send controller configuration with FIFO DMA (Direct Memory Access) Receive sampled data from FIFO DMA Compute weight Display Data Save Data Receive user commands FPGA: Read coefficients from FIFO DMA Receive commands from host Execute control loop: Read Data from ADC 1 (position signal), write to FIFO DMA Perform control algorithm on soft core Write data to DAC, write to FIFO DMA Read data from ADC 2 (current), write to FIFO DMA Execute loop until host sends „stop“ Communication PXI-Bus Data exchange via FIFO DMA
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Realized specifications
Control loop runs with up to 350 kHz Speed limited only by size of program running on soft core Input resolution 16 bit Output resolution 16 bit Very stable execution PXI bus only used for communication between host program and FPGA → Now we have a suitable system for the implementation of digital controllers
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Controller design Existing: Several papers about digital controllers for EMC load cells Reduction of measurement time by ~ 30 % (Pfeiffer et. al.) Very complex control algorithm Controller concept needed for EMC load cell with max. load 220 g Mechanical resonance at ~ 475 Hz (transmission lever) → unstable for common PID controllers → analog PIDT1 controller realized → stable but slow For comparison purposes: design of a digital PIDT1-controller
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Digital PIDT1-controller
Blue – balance Magenta – controller Green – open loop Red – closed loop Structural limitations: controller acts in low frequency range Increase bandwidth: Increase gain Resonance should not cross 0dB
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Digital polynomial controller
Controller design: System transfer function known well Compensate resonances → reduction to (ideal) PT2 behavior → only PIDT1-controller needed for fast control loop → polynomial controller of order 7 → Bandwidth: increase from ~ 90 Hz to ~370 Hz Blue – balance Magenta – controller Green – open loop Red – closed loop
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Conclusion Possible to implement digital control concept to EMC load cell With digital controllers measurement speed can be increased significantly Therefore: Suitable hardware needed Comparison of controller based and FPGA based hardware Problems of controller based hardware omitted with FPGA Realization of control loops up to 350 kHz Simple controller design realized Outlook: with more advanced controller design further improvement in speed and performance
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References F. Hilbrunner, H. Weis, R. Petzold, T. Fröhlich, G. Jäger, Investigation in the Impedance-Frequency-Response for a Dynamic Behaviour Description of Electromagnetic Force Compensated Load-Cells, XX IMEKO World Congress, Busan, Republic of Korea, 2012 I. Gushchina, B. Däne, A. Moskalev, W. Fengler, Untersuchung zur FPGA-Implementierung von Mess- und Regelungsalgorithmen, EKA2012 Beschreibungsmittel, Methoden, Werkzeuge und Anwendungen, Magdeburg, pp , ISBN: , 2012 A. Pacholik, J. Klöckner, M. Müller, I. Gushchina, W. Fengler, LiSARD: LabVIEW Integrated Softcore Architecture for Reconfigurable Devices, ReConFig 2011.International Conference on ReConFigurable Computing and FPGAs, Cancun (Mexico), pp , ISBN: , 2011 R. Maier, G. Schmidt, Advanced Digital Control and Filtering for High-Precision Weighing Cells, Proceedings of the International Conference on Advanced Mechatronics, p , 1989 R. Maier, G. Schmidt, Integrated Digital Control and filtering for an Electrodynamically Compensated Weighing Cell, IEEE Transactions on Instrumentation and Measurement, Vol. 38, No. 5, p , 1989 W. Balachandran, M. Halimic, M. Hodzic, M. Tariq, Y. Enab, F. Cecelja, Optimal digital Control and Filtering for Dynamic Weighing Systems, Proceedings of Instrumentation and Measurement Technology Conference IMTC, IEEE, 1995 W. Becker, P. Siebert, Elektromechanische Kompensationswaage mit digitaler Regelung, wägen + dosieren, Nr. 6, p. 2-7, 1991 W. Becker, P. Siebert, Elektromechanische Kompensationswaage mit modellgestützter Messung des Wägegutes, tm Technisches Messen 58, Oldenbourg Verlag, P , 1991 A. Pfeiffer, G. Schmidt, Integrated H∞ Design for Filtering and Control Operations of a High-Precision Weighing Cell, Proceeding of the Asian Control Conference, Vol. 2. p , 1994 A. Pfeiffer, Intergierter κ∞-Regler/Filterentwurf für elektromechanische Präzisionswaagen, Dissertationsschrift, Düsseldorf, VDI-Verlag, 1996
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Aknowledgement This project is funded by the Federal Ministry of Education and Research (BMBF): InnoProfile Transfer: “Neuartige Anwendungsfelder innovativer Kraftmess- und Wägetechnik” in cooperation with: Sartorius Weighing Technology GmbH SIOS Meßtechnik GmbH PAARI Waagen- und Anlagenbau GmbH driveXpert.
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Thank you for your attention
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