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Instructor: Alexander Stoytchev

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1 Instructor: Alexander Stoytchev
CprE 281: Digital Logic Instructor: Alexander Stoytchev

2 NAND and NOR Logic Networks
CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev

3 Administrative Stuff HW2 is due today

4 Administrative Stuff HW3 is out It is due on Monday Sep 15 @ 4pm.
Please write clearly on the first page (in BLOCK CAPITAL letters) the following three things: Your First and Last Name Your Student ID Number Your Lab Section Letter Also, please Staple your pages Use Letter-sized sheets

5 Quick Review

6 The Three Basic Logic Gates
x 1 2 × x 1 2 + x NOT gate AND gate OR gate [ Figure 2.8 from the textbook ]

7 Truth Table for NOT x 1 x

8 Truth Table for AND x 1 2 ×

9 Truth Table for OR x 1 2 +

10 DeMorgan’s Theorem

11 Example 2.10 Implement the function f(x1, x2, x3) = Σ m(2, 3, 4, 6, 7)

12 Minterms and Maxterms (with three variables)
[ Figure 2.22 from the textbook ]

13 Minterms and Maxterms (with three variables)

14 The SOP expression is: This could be simplified as follows:

15 Example 2.12 Implement the function f(x1, x2, x3) = Π M(0, 1, 5),
which is equivalent to f(x1, x2, x3) = Σ m(2, 3, 4, 6, 7)

16 Minterms and Maxterms (with three variables)

17 The SOP expression is: This could be simplified as follows:

18 Two New Logic Gates

19 NAND Gate x1 x2 f 1

20 NOR Gate x1 x2 f 1

21 AND vs NAND x 1 2 × x 1 2 × x1 x2 f 1 x1 x2 f 1

22 AND followed by NOT = NAND
x 1 2 × x 1 2 × x1 x2 f 1 f 1 x1 x2 f 1

23 NAND followed by NOT = AND
x 1 2 × x 1 2 × x 1 2 × x 1 x 2 x1 x2 f 1 f 1 x1 x2 f 1

24 OR vs NOR x 1 2 + x1 x2 f 1 x1 x2 f 1

25 OR followed by NOT = NOR x 1 2 + x1 x2 f 1 f 1 x1 x2 f 1

26 NOR followed by NOT = OR x 1 2 + x 1 2 + x1 x2 f 1 f 1 x1 x2 f 1

27 Why do we need two more gates?

28 Why do we need two more gates?
They can be implemented with fewer transistors. (more about this later)

29 They are simpler to implement, but are they also useful?

30 Building a NOT Gate with NAND
x x x f 1 x 1

31 Building a NOT Gate with NAND
x x x f 1 x 1 impossible combinations

32 Building a NOT Gate with NAND
x x x f 1 x 1 impossible combinations Thus, the two truth tables are equal!

33 Building an AND gate with NAND gates
[

34 Building an OR gate with NAND gates
[

35 Any Boolean function can be implemented
Implications Any Boolean function can be implemented with only NAND gates!

36 NOR gate with NAND gates
[

37 XOR gate with NAND gates
[

38 XNOR gate with NAND gates
[

39

40 Building a NOT Gate with NOR
x x x x f 1 x 1

41 Building a NOT Gate with NOR
x x x x f 1 x 1 impossible combinations

42 Building a NOT Gate with NOR
x x x x f 1 x 1 impossible combinations Thus, the two truth tables are equal!

43 Building an OR gate with NOR gates
[

44 Let’s build an AND gate with NOR gates

45 Any Boolean function can be implemented
Implications Any Boolean function can be implemented with only NOR gates!

46 NAND gate with NOR gates
[

47 XOR gate with NOR gates [

48 XNOR gate with NOR gates
[

49 The following examples came from this book

50 [ Platt 2009 ]

51 [ Platt 2009 ]

52 [ Platt 2009 ]

53 DeMorgan’s theorem in terms of logic gates
x 1 x 1 2 x 1 x x 2 2 (a) x x = x + x 1 2 1 2

54 DeMorgan’s theorem in terms of logic gates
x 1 x x 1 1 x x 2 x 2 2 (b) x + x = x x 1 2 1 2

55 Function Synthesis

56 Using NAND gates to implement a sum-of-products
x 1 2 3 4 5 [ Figure 2.27 from the textbook ]

57 Using NOR gates to implement a product-of sums
x 1 2 3 4 5 [ Figure 2.28 from the textbook ]

58 Example 2.13 Implement the function f(x1, x2, x3) = Σ m(2, 3, 4, 6, 7)
using only NOR gates.

59 Example 2.13 The POS expression is: f = (x1 + x2) (x2 + x3)
Implement the function f(x1, x2, x3) = Σ m(2, 3, 4, 6, 7) using only NOR gates. The POS expression is: f = (x1 + x2) (x2 + x3)

60 NOR-gate realization of the function
x1 f (a) POS implementation (b) NOR implementation x3 x2 [ Figure 2.29 from the textbook ]

61 Example 2.14 Implement the function f(x1, x2, x3) = Σ m(2, 3, 4, 6, 7)
using only NAND gates.

62 Example 2.14 The SOP expression is: f = x2 + x1x3
Implement the function f(x1, x2, x3) = Σ m(2, 3, 4, 6, 7) using only NAND gates. The SOP expression is: f = x2 + x1x3

63 NAND-gate realization of the function
x1 f x2 x3 (a) SOP implementation x1 f x2 x3 (b) NAND implementation [ Figure 2.30 from the textbook ]

64 Questions?

65 THE END


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