1. Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ CprE 281: Digital Logic

2. Design Examples CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev

3. Administrative Stuff HW3 is out It is due on Monday Sep 14 @ 4pm. Please write clearly on the first page (in BLOCK CAPITAL letters) the following three things:  Your First and Last Name  Your Student ID Number  Your Lab Section Letter Also, please  Staple your pages  Use Letter-sized sheets

4. Administrative Stuff TA Office Hours: Mondays @ 9:30 - 10:30 am (James Bonner) Location: TLA (Coover Hall - first floor) Tuesdays @ 11:00 am - 1:00 pm (Yu-Wen Chen) Location: Durham Hall, room 314. Thursdays @ 2:30-3:30 pm (James Bonner) Location: TLA (Coover Hall - first floor) Fridays @ 12:00 pm – 2:00 pm (Rakesh Maddineni) Location: TLA (Coover Hall - first floor)

5. Administrative Stuff Homework Solutions will be posted on BlackBoard

6. Quick Review

7. x 1 x 2 x 1 x 2 + AND gate x x x 1 x 2 x 1 x 2  The Three Basic Logic Gates [ Figure 2.8 from the textbook ] OR gate NOT gate You can build any circuit using only these three gates

8. Figure B.21. A 7400-series chip. (a) Dual-inline package (b) Structure of 7404 chip V DD Gnd

10. NAND Gate x1x1 x2x2 f 001 011 101 110

11. NOR Gate x1x1 x2x2 f 001 010 100 110

12. AND followed by NOT = NAND x1x1 x2x2 f 001 011 101 110 x1x1 x2x2 f 000 010 100 111 x 1 x 2 x 1 x 2  x 1 x 2  f 1 1 1 0 x 1 x 2 x 1 x 2 

13. NAND followed by NOT = AND x1x1 x2x2 f 000 010 100 111 x 1 x 2 x 1 x 2  x1x1 x2x2 f 001 011 101 110 x 1 x 2  f 0 0 0 1 x 1 x 2 x 1 x 2 

14. OR followed by NOT = NOR x1x1 x2x2 f 001 010 100 110 x1x1 x2x2 f 000 011 101 111 f 1 0 0 0 x 1 x 2 x 1 x 2 +x 1 x 2 +

15. NOR followed by NOT = OR x1x1 x2x2 f 000 011 101 111 x1x1 x2x2 f 001 010 100 110 f 0 1 1 1 x 1 x 2 x 1 x 2 + x 1 x 2 + x 1 x 2 x 1 x 2 +

16. Why do we need two more gates? They can be implemented with fewer transistors. (more about this later)

17. Building a NOT Gate with NAND xx 0 1 1 0 x x xx xxf 001 011 101 110 impossible combinations Thus, the two truth tables are equal!

18. Building an AND gate with NAND gates [http://en.wikipedia.org/wiki/NAND_logic]

19. Building an OR gate with NAND gates [http://en.wikipedia.org/wiki/NAND_logic]

20. Implications Any Boolean function can be implemented with only NAND gates!

21. Implications Any Boolean function can be implemented with only NAND gates! The same is also true for NOR gates!

22. Another Synthesis Example

23. Truth table for a three-way light control [ Figure 2.31 from the textbook ]

24. Minterms and Maxterms (with three variables) [ Figure 2.22 from the textbook ]

25. Let’s Derive the SOP form

27. Sum-of-products realization [ Figure 2.32a from the textbook ]

28. Let’s Derive the POS form [ Figure 2.31 from the textbook ]

29. Let’s Derive the POS form

30. Product-of-sums realization [ Figure 2.32b from the textbook ]

31. Multiplexers

32. 2-1 Multiplexer (Definition) Has two inputs: x 1 and x 2 Also has another input line s If s=0, then the output is equal to x 1 If s=1, then the output is equal to x 2

33. Graphical Symbol for a 2-1 Multiplexer f s x 1 x 2 0 1 [ Figure 2.33c from the textbook ]

34. Analogy: Railroad Switch http://en.wikipedia.org/wiki/Railroad_switch]

35. Analogy: Railroad Switch http://en.wikipedia.org/wiki/Railroad_switch] select x1x1 x2x2 f

36. Analogy: Railroad Switch http://en.wikipedia.org/wiki/Railroad_switch] select x1x1 x2x2 f This is not a perfect analogy because the trains can go in either direction, while the multiplexer would only allow them to go from top to bottom.

37. Truth Table for a 2-1 Multiplexer [ Figure 2.33a from the textbook ]

38. Let’s Derive the SOP form

40. s x 1 x 2 Where should we put the negation signs?

41. Let’s Derive the SOP form s x 1 x 2

42. Let’s Derive the SOP form s x 1 x 2 f (s, x 1, x 2 ) = s x 1 x 2 +++

43. Let’s simplify this expression f (s, x 1, x 2 ) = s x 1 x 2 +++

44. Let’s simplify this expression f (s, x 1, x 2 ) = s x 1 x 2 +++ f (s, x 1, x 2 ) = s x 1 (x 2 + x 2 )s (x 1 +x 1 )x 2 ++

45. Let’s simplify this expression f (s, x 1, x 2 ) = s x 1 x 2 +++ f (s, x 1, x 2 ) = s x 1 (x 2 + x 2 )s (x 1 +x 1 )x 2 ++ f (s, x 1, x 2 ) = s x 1 s x 2 +

46. Circuit for 2-1 Multiplexer f x 1 x 2 s f s x 1 x 2 0 1 (c) Graphical symbol (b) Circuit [ Figure 2.33b-c from the textbook ]

47. More Compact Truth-Table Representation 0000 0010 0101 0111 1000 1011 1100 1111 (a)Truthtable sx1x1 x2x2 f (s, x 1, x 2 ) [ Figure 2.33 from the textbook ] 0 1 f (s, x 1, x 2 ) s x1x1 x2x2

48. 4-1 Multiplexer (Definition) Has four inputs: w 0, w 1, w 2, w 3 Also has two select lines: s 1 and s 0 If s 1 =0 and s 0 =0, then the output f is equal to w 0 If s 1 =0 and s 0 =1, then the output f is equal to w 1 If s 1 =1 and s 0 =0, then the output f is equal to w 2 If s 1 =1 and s 0 =1, then the output f is equal to w 3

49. 4-1 Multiplexer (Definition) Has four inputs: w 0, w 1, w 2, w 3 Also has two select lines: s 1 and s 0 If s 1 =0 and s 0 =0, then the output f is equal to w 0 If s 1 =0 and s 0 =1, then the output f is equal to w 1 If s 1 =1 and s 0 =0, then the output f is equal to w 2 If s 1 =1 and s 0 =1, then the output f is equal to w 3 We’ll talk more about this when we get to chapter 4, but here is a quick preview.

50. Graphical Symbol and Truth Table [ Figure 4.2a-b from the textbook ]

51. The long-form truth table

52. [http://www.absoluteastronomy.com/topics/Multiplexer]

53. The long-form truth table [http://www.absoluteastronomy.com/topics/Multiplexer]

54. The long-form truth table [http://www.absoluteastronomy.com/topics/Multiplexer]

55. The long-form truth table [http://www.absoluteastronomy.com/topics/Multiplexer]

56. 4-1 Multiplexer (SOP circuit) [ Figure 4.2c from the textbook ]

57. 0 w 0 w 1 0 1 w 2 w 3 0 1 f 0 1 s 1 s Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer [ Figure 4.3 from the textbook ]

58. Analogy: Railroad Switches http://en.wikipedia.org/wiki/Railroad_switch]

59. Analogy: Railroad Switches http://en.wikipedia.org/wiki/Railroad_switch] s1s1 w0w0 f w1w1 w2w2 w3w3

60. Analogy: Railroad Switches http://en.wikipedia.org/wiki/Railroad_switch] s1s1 w0w0 f w1w1 w2w2 w3w3 these two switches are controlled together s0s0

61. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

62. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

63. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

64. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer f s1s1 s0s0 w0w0 w1w1 w2w2 w3w3

65. That is different from the SOP form of the 4-1 multiplexer shown below, which uses less gates

66. w 8 w 11 s 1 w 0 s 0 w 3 w 4 w 7 w 12 w 15 s 3 s 2 f 16-1 Multiplexer [ Figure 4.4 from the textbook ]

67. [http://upload.wikimedia.org/wikipedia/commons/2/26/SunsetTracksCrop.JPG]

68. Questions?

69. THE END