1. A Novel 1. 5V CMFB CMOS Down-Conversion Mixer Design for IEEE 802
A Novel 1.5V CMFB CMOS Down-Conversion Mixer Design for IEEE a WLAN Systems
Xuezhen Wang, Robert Weber,
and Degang Chen
Dept. of Electrical and Computer Engineering
Iowa State University, U. S. A.

2. Outline Introduction Mixer circuit design Simulation results
Conclusions

3. Introduction
The growing wireless LAN market has generated increasing interest in technologies that will enable higher data rates and capacity than initially deployed systems
The IEEE a standard provides nearly five times the data rate and as much as ten times the overall system capacity as currently available b wireless LAN systems

4. Introduction (cont. )
Fast growth of personal communication market highly demands to produce low cost and low power transceivers for wireless applications
As a low cost alternative, CMOS is becoming a contender for RF front-end IC applications
In low-voltage RF IC design, high LO drives are difficult to generate

5. MOS version of Gilbert-type mixer
Cannot operate at near 1V supply due to the stack of the three saturated transistors
Designing a CMOS mixer that can operate at 5-6 GHz with low voltage becomes a challenging task

6. State-of-the-art research
Cheng et al. designed a 1.2 V, 900 MHz CMOS mixer circuit using current mode multiplication method (ISCAS 02)
However, the conversion gain is only -9 dB.
Kathiresan et al. proposed a CMOS mixer core, operating at 1GHz, where the RF signal is input via the bulk (ISCAS 99)
But their conversion gain is only 2.09 dB

7. Motivation and goal
Due to the limitations of the existing research work, Wang et al. proposed a low-voltage 5.8 GHz mixer design in a TSMC 0.18 µm CMOS process (RAWCON 03)
This paper is a further improvement of the design in RAWCON 03

8. Complete schematic of the 5
Complete schematic of the 5.8GHz mixer with common mode feedback structure

9. Features of the new design
PMOS transistors M1 and M2 are used for the RF input stage to convert the RF input voltage to current, which is coupled to the core of Gilbert Cell using current mirror (transistors M9-M10 and M11-M12)
This implementation eliminates the current source transistor at bottom and furthermore reduces the supply voltage
The proposed design has common-mode feedback (CMFB) structure

10. Common-mode feedback (CMFB) structure tradeoffs
Advantages:
Guarantee that there is only Vds voltage drop from Vdd, which make the circuit work at a low voltage condition and also enlarges the output swing at the same time
Disadvantages:
Increase the power dissipation compared to the design in RAWCON 03
May suffer from large flick noise

11. Conversion gain of the mixer

12. Noise figure of the mixer

13. IIP3 of the mixer

14. S11 of the Mixer

15. S22 of the Mixer

16. Performance summary of mixer
Parameter
Value
Technology
0.18 um CMOS
Supply Voltage
1.5 V
Power Dissipation
11.78 mW
RF Frequency
5.8 GHz
LO Frequency
5.6 GHz
IF Frequency
200 MHz
Conversion Gain
10.4 dB
SSB Noise Figure
13.6 dB
IIP3
dBm
S11
-18 dB
S22
-26.4 dB

17. Conclusions
This paper has described a low-voltage 5.8 GHz mixer design integrated in a TSMC 0.18 um CMOS process
The proposed method features that an RF input stage converts the RF input voltage to current, which is coupled to the core of Gilbert Cell using current mirror
Common-mode feedback is used for the active load of the mixer
This mixer can be used for low voltage and low power wireless applications