1. 741 Op-Amp
Where we are going:

2. Source Degeneration Why do this? Higher Linearity Possible Stability
GND
Vout
Vin
Circuit
Element
Vout
Vin
Why not do this? gm
Lower Bandwidth
Higher Noise / Df
GND

3. Source Degeneration I I = Ieo e V1 /UT = Ieo e(Vin - V1 + Vout/Av )/UT
Neglect VA of Q1 and assume matched devices:
Vout I
Vin
I = Ieo e V1 /UT = Ieo e(Vin - V1 + Vout/Av )/UT
Vin V1
2 V1 = Vin + Vout / Av
GND Q1
I = Ieo e(Vin + Vout/Av )/(2 UT)
GND
A similar result for MOSFETs

4. Common Emitter Ibias Ibias = Ico eVin/UT eVout /VA Vout Vin
Common Emitter / Common Source
Vdd
Amplifies the input signal at the output
Ibias
100mA
Assuming an ideal current source:
Vout
Ibias = Ico eVin/UT eVout /VA
Vin
Vout = -VA ln(Ibias/Ico) + - (k VA / UT) Vin
GND

5. Common Drain Ibias Ibias = Ibias ekDVin/UT eDVout/VA
Vdd
Amplifies the input signal at the output
100pA
Ibias
Ibias = Ibias ekDVin/UT eDVout/VA
Vout
Vin
DVout = - (k VA / UT) DVin
GND
Input conductance = 0

6. Common Drain Id = Ibias e-DVout/VAp = Ibias ekDVin/UT eDVout/VAn
We must account for the other current source:
Vdd Vb
Ibias
Id = Ibias e-DVout/VAp
= Ibias ekDVin/UT eDVout/VAn M6
Vout
Vin M7
DVout = - (k (VAn // VAp) UT) DVin
GND

7. Common-Drain: Amplifier Measurements
Vdd V1 M6
Ibias
Vout Mb M7
GND
GND

8. Common Drain Ibias Ibias = (K/2) ( Vin - VT )2 (1 + (Vout/VA) )
What about above-threshold operation:
Vdd
Operating region decreases (Vout > Vin - VT)
Derive using quadratic functions:
100mA
Ibias
Vout
Ibias = (K/2) ( Vin - VT )2 (1 + (Vout/VA) )
Vin
GND
Vout = VA( )
Amplifies the input signal at the output

9. Common E / S: Resistive Load

10. High-Gain Amplifier Experiments
Load-line Analysis

11. Common Base Ibias Ibias = Ico e (Vb -Vin )/UT eVout /VA
Common Base / Common Gate
Vdd
Amplifies the input signal at the output (non-inverting gain)
Ibias
100mA
Assuming an ideal current source:
Vout
Ibias = Ico e (Vb -Vin )/UT eVout /VA Vb
Vout = -VA ln(Ibias/Ico) + (VA / UT) Vin
- (VA / UT) Vb
Vin
Gain = VA / UT = Av

12. Common Gate Ibias = Io e (kVb -Vin )/UT eVout /VA Ibias
Vdd
Using a subthreshold MOSFET :
100pA
Ibias = Io e (kVb -Vin )/UT eVout /VA
Ibias
Vout = -VA ln(Ibias/Io) + (VA / UT) Vin
- (k VA / UT) Vb
Vout Vb
Gain = VA / UT = Av
Vin
Problem: Large input current

13. Common G: Resistive Load

14. Cascode Circuits Use a common-gate/base transistor to:
1. Improve the output resistance of another transistor.
2. Reduce the Gate-to-Drain capacitance effect
of another transistor.
Vdrain
Vin
GND V1
Vgate
Input resistance of common-gate is low
Source is nearly fixed
if connected to the
drain of a transistor

15. Cascode Circuits
Vdrain
Vdrain
Vbias
Vgate
GND V1
Vgate
GND
Idrain = Io e kVgate/UT e kVbias /VA eVdrain / (Av VA )
Idrain = Io e (kVbias -V1 )/UT eVdrain /VA
= Io e kVgate/UT eV1 /VA
V1 ~ kVbias - kVgate + (UT/VA) Vdrain
Drain is fixed
Fixes the voltage at V1 or isolates V1 from the output

16. Cascode Common-Drain Amp
Vdd
One Pole V1
High
Output
Resistance /
DC Gain
biasp
Vout
Ibias
biasn Vb Mb
GND
GND

17. BJT Cascode Configuration

18. MOS Cascode Circuit

19. BJT - CMOS Cascode Circuits
Preserve High-gm/I

20. Cascade Configurations

21. Cascade Connection: Rout

22. BJT-MOS Cascades
A good way to get zero base current….

23. Cascades: More stuff