1. Jan Królikowski Warsaw University
CMS Annual Review 2003 PACT - the RPC Muon Trigger Bari-Helsinki-Laapperanta-Warsaw
Jan Królikowski
Warsaw University

2. PACT tasks
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

3. PACT ESR
The Electronics System Review of the PACT Muon Trigger was held on July, 8th, 2003 in Warsaw.
The extensive documentation prepared for this review can be found at : This documentation reflects the present status of the project.
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

4. Outline PACT layout Progress since 2002 / Open issues
Link system
Counting room electronics
Cost, schedule and milestones
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

5. Coverage of initial system 4 stations up to ~ 1.24 ; 3 up to ~1.6
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

6. PACT electronics: layout and main components
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

7. PACT inventory
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

8. Progress since 2002 Overall organization of the project
UXC55 electronics:
progress in the Link System prototypes and design. Now entering preparation of production phase.
Firming up of the LB boxes installation plans.
UCS55 electronics:
progress in PAC algorithms and FPGA implementation of 4/6 plane algorithms,
VHDL codes for many compnents (sorters, GhostBusters) developed and tested,
New Sorter Crate architechture
Overall organization of the project
New division of tasks between Bari/ Laapperanta/ Warsaw
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

9. UXC55 electronics Progress in the Link system
Link Board + Control Board + Optical Link: prototypes succesfully tested in the LHC-like beam in May 2003
Monitoring of the RPC performance and test pulses – succesfully tested as well.
Powerful diagnostic tools installed on the LB
Setting up of the RPC FEB parameters via I2C still to be tested.
Radiation tests of FPGAs and FLASH memories
Reloading of FPGAs on the LB every 4-10 minutes is sufficient
Integration and installation issuses: constant progress
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

10. LB functionalities
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

11. LB RE1/1 prototype 2003
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

12. Tested functionalities of Link System
Synchronization of signals from chambers
Histogram of signals in synchronization window
Histogram of all signals from chambers
Histogram “bx history”
“Snapshots”
Test pulses
TTCrx signals distribution
LB FPGAs loading from CB
CCU and VME interfaces
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

13. Tested functionalities of Link System
Synchronization of signals from chambers
Histogram of signals in synchronization window
Histogram of all signals from chambers
Histogram “bx history”
“Snapshots”
Test pulses
TTCrx signals distribution
LB FPGAs loading from CB
CCU and VME interfaces
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

14. Test Pulses Sharpness of the Synchronization Window
Test pulse directly connected to input channel with short (~5cm) cable
Test pulse
Synchronization window
widow open
widow close
The sharpness of the synchronization window edge is ~0.3 ns (one channel)
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

15. Test Pulses Input Channels Skew
One test pulse directly connected to each input channel
Found the source of the problem: big skew between input channels (~1ns)
Reason: differences in paths lengths on the PCB
After fixing the paths lengths the skew should be reduced to ~0.4ns
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

16. The „bx history” histogram - train of 48 bx’s with muons
Beam tests Histograms
The muon beam profile
The „bx history” histogram - train of 48 bx’s with muons
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

17. Beam tests Window Size and Position Scans
Ratio of chamber noise signals in synchronization window to all measured.
The beam bunch time shape scanned with 1ns window
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

18. Bx RB1 Channel RB2 Beam tests Snapshots
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

19. Beam tests Snapshots, Clusters Size Distribution
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

20. Conclusions from the LB system tests in May 2003
The histograms and snapshots work well and have proved their usefulness in testing the performance of chambers.
TTCrx signals distribution, test pulses and FPGA loading work well.
Optical link will be tested as soon as the quartz for the PLL is available
Problems with CCU block transfer and I2C control of FEBs
Solved now
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

21. Conclusions of 2002 and 2003 radiation tests in Jyvaskyla
Xilinx Spartan-IIE chips have small enough SEU in configuration bits
Dynamic SEU are much less probable then SEU in configuration bits
Reloading of the FPGAs every 10 minutes should guarantee that at most a few SEUs will be accumulated in all LBs FPGAs, what should not affect the system performance
FLASH memories are resistant enough to radiation and will be used on final Control Boards
More details
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

22. LB boxes (LBx) inventory
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

23. RE1/1 LB boxes – a special case
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

24. Standard LB boxes VME crates
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

25. Integration issues: position of LB boxes in the racks on the balconies
L max= 11.5 m
Cabling RE1/2 and 1/3 signals Link Board Boxes (VME crates) in Racks
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

26. YE-1 Racks on Towers
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

27. Barrel cabling
S.Bally
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

28. Progress in UCS55 electronics
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

29. USC55 inventory
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

30. PAC processor – progress in the VHDL codes
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

31. FPGA PAC in the barrel
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

32. FPGA PAC in the endcaps
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

33. Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

34. Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

35. COST We are revising the PACT CORE cost estimate.
At present, the CORE costs are 3750 kCHF, while our starting estimate in 1997 was 3695 kCHF.
This cost estimate is for the full trigger system up to eta=2.1 but without RE5.
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

36. Financing: COST contd. TOTAL 3180 kCHF Finland 1020 kCHF
Poland kCHF
Bari kCHF
TOTAL 3180 kCHF
+ Korea kCHF ?
Almost enough
for
up to eta=1.6
Conclusion: either design a cheaper system or stage and hope for extra funding.
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

37. Main cost uncertainties/ drivers:
COST contd.
Main cost uncertainties/ drivers:
PAC FPGAs – assumed 300 CHF/pc, total amount for PAC FPGA 345 kCHF,
present cost of SPARTAN ALTERAs are higher.
Splitter system – assumed 1000 CHF/ TB, total amount for splitters 108 kCHF. The cost drivers are opto receivers (on the TB as well as on Splitter Bds) / opto transmitters.
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

38. Staging and Cost Saving
First approximation for the strategy for PACT electronics construction:
Order elements for LB system for existing RPCs (up to eta=1.6, w/o RE5) and RE11 (difficulties in latter installation of LBx there).
Order elements and assembly Splitter System only for existing RPCs.
Order elements and assembly TB w/o PAC FPGAs for the complete system.
Order PAC FPGAs for towers up to eta=1.6
If not out of money order more FPGAs/ Links.
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

39. Schedule defined Nov. ‘02
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

40. LB project schedule
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

41. Splitter schedule
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

42. TB- TC- Integration schedule
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

43. Milestones defined Nov. ‘02
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

44. Manpower Warsaw: electronics engineers + WUT students 2.5 + 2 (FTE)
PhD students 1.5
Technicians
Programmers 0.8
Finland:
Bari:
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003

45. Conclusions COST: SCHEDULE: MANPOWER:
Almost within estimates from 1997
Still substantial uncertainties ( 10 %, maybe even up to 20%?) but firming up
SCHEDULE:
Tight
Critical path: LB mechanics, splitters, trigger board
MANPOWER:
Biggest worry
Recently more help from Finland (LB production and Splitters)
Warsaw manpower sufficient for USC55 electronics - TB/ ROB/TC
Bari: suficient for Sorter Crate
Jan Królikowski, CMS Annual Review, CERN Sept. 16, 2003