1. ECEN 248 Lab 9: Design of a Traffic Light Controller
Dept. of Electrical and Computer Engineering
names

2. How to generate timing delays
The experimental board provides with the 50MHz clock signal
Generate a 1Hz clock signal using 50MHz clock signal
Use counter as the frequency divider
/* clk is the 50MHz clock signal, d is the counter, cout is the 1Hz clock signal */
clk)
begin
if (d==26'd )
begin cout <= 1'b1; d<=d+26'd1;end
else if (d==26‘ )
begin cout <=1'b0; d<=26'd0;end
else
d <= d +26'd1;
end
???x1?? = 25e6=
???x2?? = 50e6=

3. FSM Finite State Machine (FSM) Mealy machine Moore machine States
Transition: depends on inputs
Mealy machine
Using current state and current inputs to create output
Getting new output when the transition happens
More responsive
Moore machine
Using ONLY current state to create output
Getting new output when reaching new state

4. Traffic lights

5. If there are pedestrians or cars waiting to cross highway
If there are no pedestrians or cars waiting to cross highway
Night mode

6. LCD Display Configuration
Note: You can encode the light status (e.g., 1: GREEN, 2: RED,3: YELLOW, 4:STOP) in the top module. Then, use case statement to decode the light status in the display module.

7. Top-level block diagram
CLK: Global clock signal
Reset: Global reset signal, which comes from a push button
Ped_H: Pedestrian push button at the highway crossing
Ped_F: Pedestrian push button at the farm-road crossing
No_Car: It represents if the sensor detects a car on the far road. Generated by an external on/off switch

8. Deadlines
Today
Work on Lab 9
2 weeks later
Lab 9 Post-Lab due