1. Topic7: Timing Hazards José Nelson Amaral
CMPUT329 - Fall 2003
Topic7: Timing Hazards
José Nelson Amaral
CMPUT Computer Organization and Architecture II

2. CMPUT 329 - Computer Organization and Architecture II
Reading
Section 4.5 (Wakerly Textbook)
CMPUT Computer Organization and Architecture II

3. CMPUT 329 - Computer Organization and Architecture II
Hazard
haz-ard (noun) A chance of being injured or harmed; danger:
Space travel is full of hazards.
A possible chance
of danger: fire hazard.
(tr.v.) To expose to danger
or harm.
(Middle English hasard), dice game, from
Old French, possibly from Old Spanish azar, possibly
Arabic az-zahr, the gaming die : al-, the + zahr,
gaming die.]
CMPUT Computer Organization and Architecture II

4. CMPUT 329 - Computer Organization and Architecture II
Circuit’s Behavior
The steady-state behavior of a circuit is the value of the
output after the inputs have been stable for a long time.
The transient behavior of a circuit is the value of the
output while (or soon after) the inputs change.
The glitch is a (often undesirable) short pulse produced
in the output during a transient phase.
If a circuit has the possibility of producing a glitch,
the circuit has a hazard.
CMPUT Computer Organization and Architecture II

5. CMPUT 329 - Computer Organization and Architecture II
Static-1 Hazard
A static-1 hazard is a set of two input combinations Xa and Xb
such that:
(i) Xa and Xb differ in only one input variable;
(ii) both Xa and Xb produce a 1 output;
but it is possible for a momentary 0 to appear in the
output when the input transits from Xa to Xb or from
Xb to Xa
i.e., a static-1 hazard is a possibility of a 0 glitch when
we expect a steady 1 output.
CMPUT Computer Organization and Architecture II

6. CMPUT 329 - Computer Organization and Architecture II
Static-0 Hazard
A static-0 hazard is a set of two input combinations Xa and Xb
such that:
(i) Xa and Xb differ in only one input variable;
(ii) both Xa and Xb produce a 0 output;
but it is possible for a momentary 1 to appear in the
output when the input transits from Xa to Xb or from
Xb to Xa
i.e., a static-0 is a possibility of a 1 glitch when we expect
a steady 0 output.
CMPUT Computer Organization and Architecture II

7. CMPUT 329 - Computer Organization and Architecture II
Example
Does this circuit have a hazard?
If so, of what kind? 1 X
XZ’ 1 0 Z’ Z 1 F 1
0 1 YZ Y 1 0
The hazard occurs in the transition
from X,Y,Z = 111 to X,Y,Z = 110 Z Z’ YZ
XZ’ F
CMPUT Computer Organization and Architecture II

8. Static Hazards in Karnaugh MapsX Z F Y
F = X•Z’ + Y•Z X Z Y 1
How can we identify a static-1 hazard
in this Karnaugh map? 1
Two adjacent 1’s that are not in the
same term cause a static-1 hazard.
CMPUT Computer Organization and Architecture II

9. Static Hazards in Karnaugh MapsX Z F Y
F = X•Z’ + Y•Z X Z Y
How can we eliminate the hazard? 1
We can add one extra term to F.
F = X•Z’ + Y•Z + X•Y 1
X•Y
Consensus Term
CMPUT Computer Organization and Architecture II

10. Static Hazards in Karnaugh MapsX Z F Y X
F = X•Z’ + Y•Z X Z Y
How can we eliminate the hazard? 1
We can add one extra term to F.
F = X•Z’ + Y•Z + X•Y 1
X•Y
Consensus Term
CMPUT Computer Organization and Architecture II

11. CMPUT 329 - Computer Organization and Architecture II
Another Example W W 1 X Y Z
F = W’•Z + X•Z’ + X’•W
F = W’•Z + X•Z’ + X’•W 1 1 1 1 1 1 1 1 1 Z Y 1 1 1 1 1 1 1 1 1 X
1. Write minimal form for F
2. Identify static-1 hazards
3. Eliminate static-1 hazards
CMPUT Computer Organization and Architecture II

12. CMPUT 329 - Computer Organization and Architecture II
Another Example W W
F = W’•Z + X•Z’ + X’•W 1 1 1 1 1 1 1 1 1 1 Z 1 1 1 Z Y 1 1 1 1 Y 1 1 1 1 1 1 1 1 1 X X
F = W’•Z + X•Z’ + X’•W + X•W’
1. Write minimal form for F
2. Identify static-1 hazards
3. Eliminate static-1 hazards
CMPUT Computer Organization and Architecture II

13. CMPUT 329 - Computer Organization and Architecture II
Another Example W W
F = W’•Z + X•Z’ + X’•W 1 1 1 1 1 1 1 1 1 1 Z 1 1 1 Z Y 1 1 1 Y 1 1 1 1 1 1 1 1 1 1 X X
F = W’•Z + X•Z’ + X’•W + X•W’ + W•Z’
1. Write minimal form for F
2. Identify static-1 hazards
3. Eliminate static-1 hazards
CMPUT Computer Organization and Architecture II

14. CMPUT 329 - Computer Organization and Architecture II
Another Example W W
F = W’•Z + X•Z’ + X’•W 1 1 1 1 1 1 1 1 1 1 Z 1 1 1 Z Y 1 1 1 1 Y 1 1 1 1 1 1 1 1 1 X X
F = W’•Z + X•Z’ + X’•W + X•W’ + W•Z’ + X’•Z
1. Write minimal form for F
2. Identify static-1 hazards
3. Eliminate static-1 hazards
CMPUT Computer Organization and Architecture II

15. CMPUT 329 - Computer Organization and Architecture II
Dynamic Hazards
A dynamic hazard is the possibility of an output
changing more than once as the result of a single
transition.
Dynamic hazards exist when there are multiple paths
with different delays from the changing input to the
changing output.
Dynamic hazards do not occur in properly designed
two level AND-OR or OR-AND circuits.
PS: A two level AND-OR or OR-AND circuit is
properly design if a variable and its complement are
never input to the same first level gate.
CMPUT Computer Organization and Architecture II

16. Dynamic Hazard ExampleW
slow
slower X Y 1 1 1 1 1 1 1 Z
CMPUT Computer Organization and Architecture II

17. Dynamic Hazard ExampleW 1 1
slow
slower X 1 0 Y 1 0 1 0 1 1 0 1 0 0 1 1 1 Z
A dynamic hazard occurs when
oscilation may occur when a single
transition is expected.
CMPUT Computer Organization and Architecture II