1. Electronics Technology Fundamentals Chapter 21 Field-Effect Transistors and Circuits

2. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 2 21.1 Introduction to JFETs – P1 Field-Effect Transistor Voltage-controlled device Two basic types Junction FET (JFET) Metal-Oxide Semiconductor FET (MOSFET) Insert Figure 21.1

3. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 3 21.1 Introduction to JFETs – P2 Field-Effect Transistor (Continued) Terminals can be viewed like the BJT Source – counterpart of the BJT emitter Drain – counterpart of the BJT collector Gate – counterpart of the BJT base Insert Figure 21.2

4. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 4 21.1 Introduction to JFETs – P3 Field-Effect Transistor (Continued) N-Channel JFETs – normally require positive supply voltages P-Channel JFETs – normally require negative supply voltages Insert Figure 21.3

5. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 5 21.1 Introduction to JFETs – P4 Operation Overview – the JFET drain current is controlled by varying the channel width with V GS and V DS V GS varies the depletion layer which changes channel width Insert Figure 21.4

6. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 6 21.1 Introduction to JFETs – P5 Operation Overview (Continued) V DS also varies the depletion layer Figure 21.5

7. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 7 21.1 Introduction to JFETs – P6 Pinch-Off Voltage (V P ) – the value of V DS where further increases in V DS are offset by proportional increases in channel resistance

8. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 8 21.1 Introduction to JFETs – P7 Pinch-Off Voltage (V P ) (Continued) Ohmic Region – the portion of the drain curve to the left of V P Constant-Current Region – the region of operation between V P and the breakdown voltage (V BR )

9. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 9 21.1 Introduction to JFETs – P8 Shorted-Gate Drain Current (I DSS ) The maximum value of I D Measured under the following conditions: I DSS can be viewed as being the JFET equivalent of I C(sat) for a BJT

10. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 10 21.1 Introduction to JFETs – P9 Gate-Source Cutoff Voltage (V GS(off) ) The value of VGS that causes I D to drop to approximately zero V GS(off) always has the same magnitude as V P. For example: If V GS(off) = -8 V, then V P = 8 V

11. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 11 21.1 Introduction to JFETs – P10 JFET Biasing Gate-Source Junction Never allowed to become forward biased or gate current may destroy the component Reverse bias causes JFET to have extremely high gate impedance, typically in the high megohm (M  ) range

12. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 12 21.1 Introduction to JFETs – P11 Component Control – JFET drain current is controlled by its gate-source voltage where I DSS = the shorted-gate drain current rating of the device V GS = the gate-source voltage V GS(off) = the gate-source cutoff voltage

13. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 13 21.1 Introduction to JFETs – P12 Transconductance Curves – represents every possible combination of V GS and I D for the device Example: V GS(off) = -6 V and I DSS = 3 mA

14. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 14 21.1 Introduction to JFETs – P13

15. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 15 21.2 Biasing Circuits – P1 Gate Bias – the JFET counterpart of base bias

16. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 16 21.2 Biasing Circuits – P2 Gate Bias (Continued) Does not provide a stable Q-point from one JFET to another Used primarily in switching applications

17. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 17 21.2 Biasing Circuits – P3 Self-Bias – a more viable type of JFET biasing

18. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 18 21.2 Biasing Circuits – P4 Self-Bias (Continued) – graphical procedure for finding I D Plot the minimum and maximum transconductance curves Choose any value of V GS, and determine the corresponding value of I D using: Plot the (V GS, I D ) point and draw a line from this point to the graph origin The points of intersection define the limits of the Q-point operation of the circuit

19. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 19 21.2 Biasing Circuits – P5 Self-Bias (Continued) Example: V GS(off) = -2 V to -8 V, I DSS = 4 mA to 16 mA, and choose V GS = -4 V

20. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 20 21.2 Biasing Circuits – P6 Voltage-Divider Bias

21. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 21 21.2 Biasing Circuits – P7 Voltage-Divider Bias (Continued) – graphical procedure for finding I D Plot the transconductance curves Calculate V G Plot V G on the positive x-axis Calculate I D at V GS = 0 V using: Plot I D on the y-axis Draw a line from the V G point through the point on the y-axis and both curves The points of where the line intersects the JFET curves define the limits of I DQ

22. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 22 21.2 Biasing Circuits – P8 Voltage-Divider Bias (Continued) – Example: V GS(off) = -2 V to -8 V, I DSS = 4 mA to 16 mA Insert Figure 21.19

23. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 23 21.2 Biasing Circuits – P9 Voltage-Divider Bias (Continued) – provides a much more stable Q-point than either gate bias or self-bias

24. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 24 21.2 Biasing Circuits – P10

25. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 25 21.3 Common-Source Amplifiers – P1 Common-Source (CS) Amplifier – the JFET counterpart of the BJT common-emitter amplifier

26. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 26 21.3 Common-Source Amplifiers – P2 Operation Overview

27. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 27 21.3 Common-Source Amplifiers – P3 Transconductance – a ratio of a change in drain current to a change in gate-source voltage where g m = the transconductance of the JFET at a given value of V GS – measured in microsiemens (  S) or micromhos (  mhos)  I D = the change in drain current  V GS = the gate-source cutoff voltage

28. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 28 21.3 Common-Source Amplifiers – P4 Transconductance (Continued) – Example showing variation of g m

29. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 29 21.3 Common-Source Amplifiers – P5 Transconductance (Continued) – the value of g m at a specific value of V GS can be found using: where g m = the value of transconductance at the specific value of V GS g m0 = the maximum value of g m, measured at V GS = 0 V

30. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 30 21.3 Common-Source Amplifiers – P6 Amplifier Voltage Gain – can be relatively unstable because of dependence on g m

31. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 31 21.3 Common-Source Amplifiers – P7 Amplifier Voltage Gain (Continued)

32. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 32 21.3 Common-Source Amplifiers – P8 JFET Swamping – reduces the effects of variations in g m

33. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 33 21.3 Common-Source Amplifiers – P9 JFET Swamping (Continued) – improves stability, but results in a loss of voltage gain

34. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 34 21.3 Common-Source Amplifiers – P10 Amplifier Input Impedance – higher than that of a similar BJT amplifier Gate-Bias and Self-Bias Voltage-Divider Bias

35. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 35 21.4 Common-Drain and Common-Gate Amplifiers – P1 Common-Drain and Common-Gate Amplifiers – the JFET counterparts of the common- collector and common-base BJT amplifiers The Common-Drain Amplifier (Source Follower) – is an amplifier that accepts an input signal at its gate and provides an output signal at its source terminal

36. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 36 21.4 Common-Drain and Common-Gate Amplifiers – P2 The Common-Drain Amplifier (Continued)

37. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 37 21.4 Common-Drain and Common-Gate Amplifiers – P3 The Common-Drain Amplifier (Continued) where

38. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 38 21.4 Common-Drain and Common-Gate Amplifiers – P4 The Common-Drain Amplifier (Continued) Amplifier Input Impedance Voltage-Divider Bias Gate-Bias and Self-Bias

39. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 39 21.4 Common-Drain and Common-Gate Amplifiers – P5 The Common-Drain Amplifier (Continued) Amplifier Output Impedance

40. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 40 21.4 Common-Drain and Common-Gate Amplifiers – P6 The Common-Gate Amplifier – is an amplifier that accepts an input signal at its source terminal and provides an output signal at its drain terminal

41. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 41 21.4 Common-Drain and Common-Gate Amplifiers – P7 The Common-Gate Amplifier (Continued) Input impedance

42. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 42 21.4 Common-Drain and Common-Gate Amplifiers – P8 The Common-Gate Amplifier (Continued) Output impedance

43. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 43 21.4 Common-Drain and Common-Gate Amplifiers – P9 The Common-Gate Amplifier (Continued) Output impedance (Continued) Since r d is typically much larger than R D : where r d =the resistance of the JFET drain y os =the output admittance of the JFET drain

44. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 44 21.4 Common-Drain and Common-Gate Amplifiers – P10

45. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 45 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P1 Metal-Oxide-Semiconductor FET (MOSFET) JFET Drawback – gate must be reverse-biased (depletion-mode operation) MOSFET The input signal can be used to increase the effective size of the channel (enhancement-mode operation) Not restricted to operating with its gate reverse biased

46. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 46 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P2 MOSFET Construction and Handling Depletion-type MOSFETs (D-MOSFETs) - can be operated in both the depletion and enhancement modes  Enhancement-type MOSFETs (E-MOSFETs) – restricted to enhancement-mode operation

47. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 47 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P3 MOSFET Construction and Handling (Continued) Insert Figure 21.36

48. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 48 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P4 MOSFET Construction and Handling (Continued) SiO 2 layer insulating the gate from the channel is very thin and be be destroyed easily by static electricity Many MOSFETs are manufactured with protective diodes Insert Figure 21.37

49. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 49 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P5 MOSFET Construction and Handling (Continued) Precautions if inputs not protected Short leads or store in conductive foam (not Styrofoam) Handle MOSFETs by the case, not the leads Do not install or remove any MOSFET while power is applied. Also, make sure that any signal source is removed before turning supply voltage off or on

50. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 50 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P6 D-MOSFETs Depletion Mode - the characteristics of the D-MOSFET are very similar to those of the JFET Enhancement Mode – I D can be greater than I DSS

51. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 51 21.5 Introduction to MOSFETs: D- MOSFET Operation and Biasing – P7 D-MOSFETs (Continued) – uses the same transconductance equation as the JFET

52. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 52 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P8 Transconductance – the value of g m is found in the same way that it is for a JFET

53. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 53 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P9 D-MOSFET Biasing Circuits – same as those used for JFETs

54. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 54 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P10 D-MOSFET Input Impedance Extremely high due to the insulating (SiO 2 ) layer Example: A gate current = 10 pA translates to an input impedance of 3.5 X 10 12 

55. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 55 21.5 Introduction to MOSFETs: D-MOSFET Operation and Biasing – P11

56. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 56 21.6 E-MOSFETs – P1 Enhancement MOSFETs (E-MOSFETs) – conduct only in the enhancement mode

57. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 57 21.6 E-MOSFETs – P2 Transconductance Curve Threshold Voltage (V GS(th) ) – the minimum positive voltage at which the device turns on Insert Figure 21.43

58. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 58 21.6 E-MOSFETs – P3 Calculating I D where k is a constant for the MOSFET, found as: where I D(on) and V GS(on) are obtained from a spec sheet

59. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 59 21.6 E-MOSFETs – P4 E-MOSFET Biasing Circuits Voltage-divider and gate-bias can be used with E-MOSFETs Drain-Feedback Bias – MOSFET counterpart to BJT collector- feedback bias

60. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 60 21.7 Complementary MOSFETs: A MOSFET Application – P1 MOSFETs used in digital electronics Use rectangular waveforms Logic levels – dc levels used in digital applications Logic family – group of circuits that have similar operating characteristics Complementary MOS (CMOS) – a logic family Less complex than BJT logic circuits Less supply current than BJT logic circuits Need almost no input current

61. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 61 21.7 Complementary MOSFETs: A MOSFET Application – P2 Complementary MOS (CMOS) (Continued)

62. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 62 21.8 Additional FET Applications – P1 JFET Radio-Frequency (RF) Amplifier

63. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 63 21.8 Additional FET Applications – P2 The Cascode Amplifier

64. Electronics Technology Fundamentals, 3 rd ed. Paynter and Boydell © 2009 Pearson Higher Education, Upper Saddle River, NJ 07458. All Rights Reserved. 64 21.8 Additional FET Applications – P3 Power MOSFET Driver