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SPIROC ADC measurements S. Callier, F. Dulucq, C. de La Taille, M. Faucci, R. Poeschl, L. Raux, J. Rouenne, V. Vandenbussche.

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Presentation on theme: "SPIROC ADC measurements S. Callier, F. Dulucq, C. de La Taille, M. Faucci, R. Poeschl, L. Raux, J. Rouenne, V. Vandenbussche."— Presentation transcript:

1 SPIROC ADC measurements http://omega.in2p3.fr/ S. Callier, F. Dulucq, C. de La Taille, M. Faucci, R. Poeschl, L. Raux, J. Rouenne, V. Vandenbussche

2 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 2 S-curves on fast shaper Trigger efficiency versus Threshold (1UDAC=2mV) Qinj=50 fC (1/3 pe-) pedestal Qinj=50fC

3 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 3 Time measurement

4 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 4 ADC measurements ADC alone on SPIROC2 External DC input « Gaussianness » noise Linearity –Steps of 250µV between 1.2 and 2.5 V input Stability –Measurements during 48h

5 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 5 Gaussienne – Forme typique No tails, good uniformity between channels 2V ch12 2V ch27

6 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 6 Gaussiennes – 2 Volt ch1ch9 ch18 ch30

7 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 7 Gaussiennes – Channel 16 1.4V 1.8V 2V 2.2V

8 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 8 Linéarity Chip 1 Chip 2

9 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 9 Linearity : noise RMS increasing as a function of amplitude (in sqrt) Expected from noise on ramp increasing with time (parallel noise) Chip 1 Chip 2

10 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 10 Channel - Mean 1.6V 2V 2.4V Chip 2Chip 1

11 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 11 Channel - Chip n °2 1.70V 1.95V 2.45V

12 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 12 Time stability 1.5V 2V

13 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 13 Bandgap Zoom Pas de corrélation évidente entre le bandgap et la stabilité de l’ADC. 1.5V 2V

14 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 14 Summary and next steps ADC performance OK in 12 bits –ADC range : 1.2 V, LSB=300 µV –Linearity : ± 1 UADC/4096 –Noise : 0.5-1 UADC but possibly coherent… –Stability : ± 2 UADC @ 48 h Next steps –More stability measurements –Full chain measurement –Power pulsing operation

15 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 15 Slab #1 Slab #2 Slab #3 DIF #1 DIF #2 DIF #3 GRPC Fully equipped large scalable detector to be soon tested in cosmic rays bench and in test beam at cern in summer 09 DHCAL 1m2 RPC [I. Laktineh et al.]

16 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 16 µMEGAS DHCAL [C. Adloff et al.] 2 boards with 24 HaRDROC2 Validation of readout on long bus lines Preliminary power pulsing looks clean. –Expect 10 mA for full slab !

17 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 17 SPIROC : One channel schematic

18 DESY 17 july 2009 AHCAL meeting : SPIROC ADC measurements 18 DAQ ASIC Chip ID register 8 bits gain Trigger discri Output Wilkinson ADC Discri output gain Trigger discri Output Wilkinson ADC Discri output..… OR36 EndRamp (Discri ADC Wilkinson) 36 TM (Discri trigger) ValGain (low gain or high Gain) ExtSigmaTM (OR36) Channel 1 Channel 0 ValDimGray 12 bits … Acquisition readout Conversion ADC + Ecriture RAM RAM FlagTDC ValDimGray 12 8 ChipID Hit channel register 16 x 36 x 1 bits TDC ramp StartRampTDC BCID 16 x 8 bits ADC ramp Startrampb (wilkinson ramp) 16 ValidHoldAnalogb RazRangN 16 ReadMesureb Rstb Clk40MHz SlowClock StartAcqt StartConvDAQb StartReadOut NoTrig RamFull TransmitOn OutSerie EndReadOut Chipsat


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