1. P.D.Thakar Prof.Ram Meghe College of Engineering & Management

2. Syllabus Unit I Instruction Sets:  Machine Instruction Characteristics  Types of Operands  Intel x86 and ARM Data Types  Types of Operations  Intel x86 and ARM Operation Types.

3. Unit II  Instruction Sets: Addressing,  x86 and ARM Addressing modes  Instruction Formats  x86 and ARM Instruction Formats  Assembly language

4. Unit III  Processor Structure and Function: Processor Organization  Register Organization  The Instruction Cycle  Instruction Pipelining  The x86 Processor Family  The ARM Processor.

5. Unit IV  Reduced Instruction Set Computers (RISCs): Instruction  Execution Characteristics, The Use of Large Register File,  Compiler-Based Register Optimization, RISC Architecture,  RISC Pipelining. RISC versus CISC.

6. Unit V  Control Unit Operation: Micro-operations  Control of the Processor  Hardwired Implementation  Microprogrammed control  Basic Concepts, Microinstruction Sequencing & Execution.

7. Unit VI  Parallel Processing: The Use of Multiple Processors  Symmetric Multiprocessors, Multithreading and Chip Multiprocessors  Clusters  Multicore Organization  Intel x 86 Multi-Core Organization.

8. Text Book: Reference Books:  Text Book:  William Stallings: “Computer Organization and Architecture”, (8/e) Pearson  Education.  Reference Books:  1. Behrooz Parhami: “Computer Architecture”, Oxford University  Press.  2. J.P. Hayes: “Computer Architecture and Organization”, McGraw  Hill.  3. D.A. Patterson, J.L. Hennessy: “Computer Architecture” Morgan  Kauffmann, 2002.  4. Hwang and Briggs: “Computer Architecture and Parallel  Processing” McGraw-Hill.

9. What is Computer Architecture Building Architecture : Structure Design (Civil Engg.) Computer Architecture : Circuit Design (Elect Engg.)

10. Computer Architecture(cont…) Building architecture is a plan of what different parts of building are to be used for. It is overall layout where you decide functionality of different component of building. If it a residential building we will say that this is living area, kitchen. Building architect make a plan of what is the function of different part of building.

11. Computer Architecture (cont…) Relation between what an architect does for the building and what a civil engg. Does for a building is dome what similar to that of computer architect does for computer and what the logic designer do. It is a plan of overall functionality of computer and what are the basic operation it can perform, how they can be sequences. To realize this plan circuit designer is required who put the basic component together.

12. Computer Architecture (cont…) Computer architecture is refers to those attribute that have direct impact on the logical execution of the program. Example of architectural attributes include the instruction set, no. of bits used to represent various data types.

13. Why study computer architecture How to get best performance of software. Relationship between hardware and software.

15. Machine Instruction Characteristics Machine Instructions- are instructions executed by the processor. Instruction set- a collection of instructions that the processor can execute

16. Elements of a machine instruction Opcode-Do this (for ex : Add, Sub etc) Source operand reference- To this (for ex : Number of inputs ) Result operand reference-Put the answer here Next instruction reference- When you have done that, do this.

17. Instruction Cycle State Diagram Read inst from its memory location into the processor Fetch the operand from memory or read it in from i/o Write result in memory or out to i/o Dt add of next inst to be excuted Analyze inst to det type of opt to be performed and operand to used Det the add of the operand Perform op indicated in inst

18. Source and result operands can be found in Main or virtual memory Processor register- contains registers that can be used by machine instructions Immediate- the operand value is being contained when the instruction is being executed I/O devices- instruction specifies I/O module and device but if memory mapped then just another main or virtual memory address

19. Instruction Representation OPCODE (4 Bits) Ref to Operand 1 (6 Bits) Ref to Operand 2 (6 Bits) An instruction format is used to define the layout of the bits allocated to these elements of instructions. The instruction format explicitly or implicitly indicates the addressing Modes used for each operand in that instruction.

20. Instruction Representation Each instruction is represented by sequence of bits. During execution, an instruction is read into instruction reg (IR) in the processor. The processor must be able to extract data from the various fields to perform the required operation. It is not possible to deal with the binary representation of m/c instr. So to solve this problem “Symbol representation” is introduced

21. Mnemonics ADD add SUB subtract MUL multiply DIV divide LOAD load data from memory STOR store data to memory

22. Instruction Representation(cont…) Operands are also represented symbolically For example ADD R,Y It is represented as X=X+Y

23. Instruction Types Consider X=X+Y Let corresponding address of variable x and y location will be 513 and 514. By using simple set of m/c instruction as follows : 1. R <- X 2. R <-R+Y 3. R -> X

24. Instruction Types (cont…) Data processing- Arithmetic and Logic inst. Data storage -movement of data in or out of register or memory Data movement - I/O Program flow control- Test and Branch

25. Number of Addresses (a) 3 addresses Two operand location and one result location Operand 1, Operand 2, Result a = b + c; Temporary location “T” is used Format is Not common Needs very long words to hold everything

26. Y=(A-B)/(C+(D*E)) Instruction Comment SUB Y,A,B Y<-A-B MPY T,D,E T<-D*E ADD T,D,C T<-D+C DIV Y,Y,T Y<-Y/T

27. Number of Addresses (b) 2 addresses One address doubles as operand and result SUB Y,B MOVE instruction is used to move the data

28. Y=(A-B)/(C+(D*E)) Instruction Comment MOVE Y,AY <- A SUB Y,BY <- Y-B MOVE T,DT <- D MPY T,ET <- T*E ADD T,CT <- T+C DIV Y,TY <- Y/T

29. Number of Addresses (c) 1 address Implicit second address Usually a register (accumulator OR AC) Common on early machines

30. Y=(A-B)/(C+(D*E)) Instruction Comment LOAD DAC <- D MPY EAC <- AC * E ADD CAC <- AC + C STOR YY <- AC LOAD AAC <- A SUB BAC <- AC-B DIV YAC <- AC / Y STOR YY <- AC

31. Number of Addresses (d) 0 (zero) addresses All addresses implicit Uses a stack e.g. push a push b add pop c c = a + b

32. Y=(A-B)/(C+(D*E)) Instruction PUSH A PUSH B SUBSTRACT PUSH C PUSH D PUSH E MULTIPLY ADD DIVIDE POP Y

33. Number of Addresses 1 address instructions 2 Or 3 address instructions One general purpose register Multiple general purpose registers

34. How Many Addresses More addresses More complex (powerful?) instructions More registers Inter-register operations are quicker Fewer instructions per program Fewer addresses Less complex (powerful?) instructions More instructions per program Faster fetch/execution of instructions

35. Instruction Set Design Operation Repertoire- How many and which operations to provide, and how complex the operations should be. Data Types- The various types of data upon which operations are performed. Instruction Format- Instruction length (in bits), number of addresses and size of fields.

36. Instruction Set Design Registers- Number of processor registers that can be referenced by instructions, and their use Addressing- The mode or modes by which the address of an operand is specified.

37. Types of Operand Addresses Numbers Integer floating point Decimal Characters ASCII etc. Logical Data Bits or flags

38. Data types INTEL X86 DATA TYPES ARM DATA TYPES

39. INTEL X86 Data Types 8 bit (Byte) 16 bit (word) 32 bit (double word) 64 bit (quad word) Addressing is by 8 bit unit A 32 bit double word is read at addresses divisible by 4

40. X86 Data Types

41. Format of Data Types

42. ARM Data-types The architecture support three alternative 1. Default case 2. Alignment checking 3. Unaligned Access

44. Type of Operations The number of different opcodes varies widely from machine to machine. The general types of operations are found on all machines. A useful and typical categorization is the following: Data transfer Arithmetic Logical Conversion I/O System control Transfer of control

49. Shift and Rotate Operations

50. Conversion Example: Decimal to Binary TR R1(L),R2

51. Input/Output Input/Output instructions are used to interact with the i/o devices. There are three different techniques for i/o operations 1. Programmed i/0 2. Interrupt-driven i/0 3. DMA

52. Programmed i/o Data are exchanged between the processor and the I/O module. Memory - Mapped I/O: In this configuration same address space is used for both memory and I/O. There are no specific I/O instructions. It allows the computer to used the same instructions for both I/O transfers and memory transfers.

53. Isolated I/O In isolated I/O configuration the memory address and I/O address have its own address space. If the address of interface registers are placed on the address lines the I/O read or I/O write control lines are enabled. If the memory address is placed on the address lines the memory read and memory write control lines are enabled.

54. Interrupt driven & DMA Processor issue an i/o command and continues to execute other instruction, and is interrupted by i/o module when the operation is completed. Direct Memory access, there is no involvement of processor in data exchange between memory and i/o module.

55. Transfer of Control Branch Instruction Skip Instruction Procedure Call Instruction

56. Transfer of Control

59. Systems Control Privileged instructions CPU needs to be in specific state Kernel mode For operating systems use

60. Intel x86 operation types

64. CALL/RETURN INSTRUCTION CALL ENTER LEAVE RETURN

65. Memory Management The Global Descriptor Table or GDT is a data structure used by Intel x86-family processors starting with the 80286 in order to define the characteristics of the various memory areas used during program execution, including the base address, the size and access privileges like executability and writability. These memory areas are called segments in Intel terminology. Status Flag and Condition Code X86 SIMD There are 57 new instruction that treat data in SIMD fashion

66. X86 condition codes

67. X86 SIMD Instruction Three new datatypes Packed byte Packed word Packed doubleword

68. Saturation arithmetic Saturation arithmetic is a version of arithmetic in which all operations such as addition and multiplication are limited to a fixed range between a minimum and maximum value. If the result of an operation is greater than the maximum, it is set ("clamped") to the maximum; if it is below the minimum, it is clamped to the minimum.

71. ARM operation types Load And Store Instructions Branch Instructions Data Processing Instructions Multiply Instructions Parallel Addition And Subtraction Instructions Extend Instructions Status Register

72. Thank You