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Hardware/Software Co-Verification with RTOS Application Code Michael Bradley, Mentor Graphics Kainian Xie, Hyperchip Inc.

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Presentation on theme: "Hardware/Software Co-Verification with RTOS Application Code Michael Bradley, Mentor Graphics Kainian Xie, Hyperchip Inc."— Presentation transcript:

1 Hardware/Software Co-Verification with RTOS Application Code Michael Bradley, Mentor Graphics Kainian Xie, Hyperchip Inc.

2 Embedded software development Software: ISS (Instruction Set Simulation) On PC or host workstation Hardware: stub out device drivers or routines about hardware emulate hardware within debugger macro languages

3 Embedded software development (cont ’ ) Disadvantages: limitation of the macro language the accuracy of the implementation of the macro Evaluation Board FPGA

4 Hardware/Software Co-Verification “ Connect ” : ISS of the target CPU Hardware Simulator RTOS (Real-Time OS) Simulator

5 Hardware/Software Co-Verification (cont ’ ) “ Connect ” the followings in Seamless: RTOS Simulator Hardware Simulator The software can now perform system level transactions with the hardware

6 Example : the Communication Line Card Design

7 Example : the Communication Line Card Design (cont ’ ) Simulation Environment: VxSim PCI transactor model HCE (Host Code Execution) library

8 Example : the Communication Line Card Design (cont ’ ) VxSim RTOS Simulator for VxWorks Run on the PC or host workstation

9 Example : the Communication Line Card Design (cont ’ ) PCI transactor model PCI 2.1 compliant Allows I/O read/write form Vxsim to be performed in hardware Provides an interrupt facility from hardware to Vxsim

10 Example : the Communication Line Card Design (cont ’ ) HCE library Allows the user C-code to interact with the hardware simulator Major functions: Advance time in the hardware simulator Initiate PCI bus master transactions Creates a callback to accept and/or present data when the transactor is accessed as a target Creates a callback to process PCI interrupts

11 Example : the Communication Line Card Design (cont ’ )

12 Startup sequence: Initialize Seamless PCI transactor Search for PCI targets on the PCI bus. Configure targets as needed. Register PCI targets as I/O devices in the Vxworks I/O sub-systems. Start tasks to run tests

13 Synchronization : VxSim and Hardware Simulator hce_AdvanceHardware() The HCE function Used to tell the hardware simulator to advance simulation time hce_InterruptHandler(intHandler) Register the callback intHandler in Seamless

14 Loop Back Test


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