Interrupts ELEC 330 Digital Systems Engineering Dr. Ron Hayne

Slides:



Advertisements
Similar presentations
Microprocessor and Microcontroller Based Systems Instructor: Eng.Moayed N. EL Mobaied The Islamic University of Gaza Faculty of Engineering Electrical.
Advertisements

TK2633 Introduction to Parallel Data Interfacing DR MASRI AYOB.
Input/Output Ports and Interfacing ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning.
Microprocessor and Microcontroller Fundamentals
8085 Interrupts LAKSHMI.B.E.1. Interrupts  Interrupt is a process where an external device can get the attention of the microprocessor. ◦ The process.
Interrupts Disclaimer: All diagrams and figures in this presentation are scanned from the book “Microprocessors and Programmed Logic” authored by Kenneth.
I/O Unit.
ELEC 330 Digital Systems Engineering Dr. Ron Hayne
6-1 I/O Methods I/O – Transfer of data between memory of the system and the I/O device Most devices operate asynchronously from the CPU Most methods involve.
Introduction An interrupt is an event which informs the CPU that its service (action) is needed. Sources of interrupts: internal fault (e.g.. divide by.
1 Interrupts INPUT/OUTPUT ORGANIZATION: Interrupts CS 147 JOKO SUTOMO.
The 8051 Microcontroller and Embedded Systems
Microcontroller Architecture PIC18F Family
INTERRUPTS PROGRAMMING
Interrupts. What Are Interrupts? Interrupts alter a program’s flow of control  Behavior is similar to a procedure call »Some significant differences.
V 0.91 Polled IO versus Interrupt Driven IO Polled Input/Output (IO) – processor continually checks IO device to see if it is ready for data transfer –Inefficient,
Stacks and Subroutines ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning.
Input/Output Ports and Interfacing
MICROPROCESSOR INPUT/OUTPUT
Programming and Problem Solving ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning.
Khaled A. Al-Utaibi  Interrupt-Driven I/O  Hardware Interrupts  Responding to Hardware Interrupts  INTR and NMI  Computing the.
PIC16F877 ISR Points to note Interrupt Triggers –Individual interrupt flag bits are set, regardless of the status of their corresponding mask bit, PEIE.
Application Programs ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning.
Interrupt.
I/O Interfacing A lot of handshaking is required between the CPU and most I/O devices. All I/O devices operate asynchronously with respect to the CPU.
Microprocessors 1 MCS-51 Interrupts.
© 2008, Renesas Technology America, Inc., All Rights Reserved 1 Course Introduction Purpose  This training course provides an overview of the CPU architecture.
Accessing I/O Devices Processor Memory BUS I/O Device 1 I/O Device 2.
13-Nov-15 (1) CSC Computer Organization Lecture 7: Input/Output Organization.
Microprocessor. Interrupts The processor has 5 interrupts. CALL instruction (3 byte instruction). The processor calls the subroutine, address of which.
Chapter 7 Larger Systems and the PIC 16F873A The aims of this chapter are to introduce: The architecture of the 16F873A microcontroller; The 16F873A memory.
1 © Unitec New Zealand Interrupt Lecture 6 Date: - 20 Sept, 2011 Embedded Hardware ETEC 6416.
Teachers Name : Suman Sarker Telecommunication Technology Subject Name : Microcontroller & Embedded System Subject Code : 6871 Semester : 7th Department.
Interrupts  An interrupt is any service request that causes the CPU to stop its current execution stream and to execute an instruction stream that services.
Embedded Systems Design 1 Lecture Set 8 MCS-51 Interrupts.
MICRO-CONTROLLER MOTOROLA HCS12 Interrupts Mechatronics Department Faculty of Engineering Ain Shams University.
EE/CS-352: Embedded Microcontroller Systems Part V The 8051 Assembly Language Interrupts.
بسم الله الرحمن الرحيم MEMORY AND I/O.
Embedded Computer - Definition When a microcomputer is part of a larger product, it is said to be an embedded computer. The embedded computer retrieves.
Polled IO versus Interrupt Driven IO
Interrupt-Driven I/O There are different types of interrupts –Hardware Generated by the 8259 PIC – signals the CPU to suspend execution of the current.
CS-280 Dr. Mark L. Hornick 1 Sequential Execution Normally, CPU sequentially executes instructions in a program Subroutine calls are synchronous to the.
Interrupts ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning.
The 8051 Microcontroller Chapter 6 INTERRUPTS. 2/29 Interrupt is the occurrence of a condition an event that causes a temporary suspension of a program.
Aum Amriteswaryai Namah:. SUB ROUTINES Instead of repeating same program segments at all locations, they are written and stored separately; Each such.
Introduction to Exceptions 1 Introduction to Exceptions ARM Advanced RISC Machines.
Lecture – 8 Interrupt 1. Outline Introduction Handling interrupt Interrupt sources Switching interrupt Peripheral interrupts Using two interrupts Conclusions.
Chapter 10 Interrupts. Basic Concepts in Interrupts  An interrupt is a communication process set up in a microprocessor or microcontroller in which:
An Introduction to Embedded Systems, and the PIC Microcontroller Lecture 8: Interrupts The aims of this session are to explore the structure and application.
Microprocessor and Microcontroller Fundamentals
8085 Interrupts LAKSHMI.B.E..
MICROPROCESSOR BASED SYSTEM DESIGN
68HC11 Interrupts & Resets.
Microprocessor Systems Design I
The process starts from the I/O device
Computer Architecture
Interrupts In 8085 and 8086.
BVM Engineering College Electrical Engineering Department : Microprocessor and Microcontroller Interfacing Interrupts of 8051 Prepared by:
Interrupt.
8259 Chip The Intel 8259 is a family of Programmable Interrupt Controllers (PIC) designed and developed for use with the Intel 8085 and Intel 8086 microprocessors.
Interrupt.
Subject Name: Microprocessors Subject Code:10EC46 Department: Electronics and Communication Date: /20/2018.
Interrupts Interrupt is a process where an external device can get the attention of the microprocessor. The process starts from the I/O device The process.
Interrupts.
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
Interrupt Source: under
PIC18 Interrupt Programming
Figure Simplified View of Interrupts (default for power-on reset)
PIC18 Interrupt Programming
Presentation transcript:

Interrupts ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning ELEC 330

Basic Concepts of Interrupts An interrupt is a communication process A device Requests the MPU to stop processing Internal or external The MPU Acknowledges the request Attends to the request Goes back to processing where it was interrupted 330_10

Types of Interrupts 330_10

MPU Response to Interrupts When interrupts are enabled MPU checks interrupt request flag at the end of each instruction If interrupt request is present, the MPU Resets the interrupt flag Saves the return address on the stack MPU redirected to appropriate memory location Interrupt vectors Interrupt service routine (ISR) meets request MPU returns to where it was interrupted Specific return instruction 330_10

PIC18 Interrupts PIC18 Microcontroller family Has multiple sources that can send interrupt requests Does not have any non-maskable or software interrupts All interrupts are maskable hardware Has a priority scheme divided into two groups High priority and low priority Uses many Special Function Registers (SFRs) to implement the interrupt process 330_10

PIC18 Interrupt Sources External sources Internal peripheral sources Three pins of PORTB RB0/INTO, RB1/INT1,and RB2/INT2 Can be used to connect external interrupting sources Keypads or switches PORTB Interrupt (RBI) Change in logic levels of pins RB4-RB7 Internal peripheral sources Examples Timers A/D Converter Serial I/O 330_10

PIC18 Interrupt Sources Special Function Registers (SFRs) RCON Priority Enable INTCON External interrupt sources IPR, PIE, and PIR Internal peripheral interrupts Valid interrupt Interrupt request bit (flag) Interrupt enable bit Priority bit 330_10

Interrupt Priority Interrupt priorities High-priority interrupt vector 000008H Low-priority interrupt vector 000018H A high-priority interrupt can interrupt a low-priority interrupt in progress. Interrupt priority enable Bit7 (IPEN) in RCON register RCON 330_10

External Interrupts INTCON Register INTCON2 Register INTCON3 Register 330_10

Interrupt Service Routine (ISR) Similar to a subroutine Attends to the request of an interrupting source Clears the interrupt flag Should save register contents that may be affected by the code in the ISR Must be terminated with the instruction RETFIE When an interrupt occurs, the MPU: Completes the instruction being executed Disables global interrupt enable Places the return address on the stack 330_10

Interrupt Service Routine (ISR) High-priority interrupts The contents of W, STATUS, and BSR registers are automatically saved into respective shadow registers. Low-priority interrupts These registers must be saved as a part of the ISR If they are affected RETFIE [s] ;Return from interrupt RETFIE FAST ;FAST equivalent to s = 1 If s =1: MPU also retrieves the contents of W, BSR, and STATUS registers 330_10

Internal Interrupts PIC18 MCU internal interrupt sources Timers A/D converter Serial I/O Each interrupt has three bits Interrupt priority bit Interrupt enable bit Interrupt request bit (flag) Interrupt registers IPR: Interrupt Priority Register PIE: Peripheral Interrupt Enable PIR: Peripheral Interrupt Request (Flags) 330_10

Interrupt Registers IPR1 PIE1 PIR1 330_10

Multiple Interrupt Sources All interrupt requests are directed to one of two memory locations (interrupt vectors) 000008H (high-priority) 000018H (low-priority) When there are multiple requests The interrupt source must be identified by checking the interrupt flags 330_10

Illustration Problem Statement INT1 set up as a high-priority interrupt Timer1 and Timer2 set up as low-priority Identify the interrupt sources Execute the appropriate interrupt service routines 330_09 ELEC 330

Illustration Label Opcode Operand Comments S_TMP EQU 0x00 ;Temp Registers W_TMP 0x01 ORG GOTO MAIN 0x08 ;High-Priority Interrupt Vector INTCHK: INT1_ISR 0x18 ;Low-Priority Interrupt Vector TIMERCHK: BTFSC PIR1,TMR1IF ;Timer1 Flag, Skip if Clear TMR1_ISR PIR1,TMR2IF ;Timer2 Flag, Skip if Clear TMR2_ISR RETFIE 330_04 ELEC 330

Illustration Label Opcode Operand Comments MAIN: ;Main Program goes here ;Do Something HERE: GOTO HERE ;Wait for an Interrupt ORG 0x100 INT1_ISR: BCF INTCON3,INT1IF ;Clear Flag RETFIE FAST ;Retrieve registers and Return 330_04 ELEC 330

Illustration Label Opcode Operand Comments TMR1_ISR: MOVFF STATUS, S_TMP MOVWF W_TMP ;Save Registers BCF PIR1,TMR1IF ;Clear Flag ;Do Something MOVF W_TMP,W ;Retrieve Registers S_TMP,STATUS RETFIE ;Return from interrupt TMR2_ISR ;Similar to Timer1 330_04 ELEC 330