I7’s Core

Intel’s Core i7

Content Overview Socket SSE 4.2 Instruction Set Cores –Intel Quickpath Interconnect –Nehalem - new micro-architecture –EP, EX socket –3 to 2 chip solution

Over View Released November 2008 CPU clock Cache Turbo Boost

Socket Known as the LGA 1366 or Socket B Contact points

Instruction Set Backwards support Added SSE 4.2 Instruction set –CRC32 –PCMPESTRI –PCMPESTRM –PCMPISTRI –PCMPISTRM –PCMPGTQ –POPCNT

Core: Over View 4 Physical, 8 logical from H/T 3 channel memory

Core: Intel Quickpath Interconnect Intel X58 Arch Replaced front side bus Max width: 20 bit Max bandwidth: 16GB/s Unidirectional I7 920, 940 –16 bit and 4.8 GT/s = 19.2 GB/s I7 965XE –16 bit and 6.4 GT/s = 25.6GB/s

Core: Nehalem –45nm architecture –Scalable performance for from one-to-16 (or more) threads and from one-to-eight (or more) cores. –Power usage

Core: EP & EX EP is for 2 sockets (the base layout) EX is for 4 and 8 sockets –Is the EP duplicated with more interconnects

Core: 3 to 2 chip solution Named Westmere Moved GPU functionality from the Northbridge onto the CPU Enables full disk encryption

Other Fun Info

More Extra Info

References Crysis Benchmark: reviewed/Reviews/?page=5 Pin set: Intel Core i7 Extreme Edition and Intel Core i7 Processor and LGA1366 Socket Intel Overclock: Intel Nehalem Arch 2 vs 3 chip solution Intel i7 homepage Intel Quickpath Intel Turboboost Nehalem Arch