Chapter 3 Digital Logic Structures

Basic Logic Gates

Basic Relations of Boolean Algebra + = OR = AND ‘ = NOT x + 0 = x x + 1 = 1 x + x = x x + x’ = 1 x + y = y + x (Commutative) x + (y+z) = (x+y)+z (Associative) x(y+z’) = xy + xz (Distributive) (x+y)’ = x’ y’ (DeMorgan) (x’)’ = x x0 = 0 x1 = x xx = x xx’ = 0 xy = yx (Commutative) x(yz) = (xy)z (Associative) x+yz = (x+y)(x+z) (Distributive) (xy)’ = x’+y’ (DeMorgan)

DeMorgan’s Law not(A and B) = (not A) or (not B) = not(A or B) = (not A) and (not B) = =

More than 2 Inputs? AND/OR can take any number of inputs. AND = 1 if all inputs are 1. OR = 1 if any input is 1. Similar for NAND/NOR. Can implement with multiple two-input gates, or with single CMOS circuit. NAND and NOR are not associative. Jim Conrad’s example: NAND(NAND(0,0), 1) = NAND(1, 1) = 0 NAND(0, NAND(0,1)) = NAND(0, 0) = 1

Summary MOS transistors are used as switches to implement logic functions. n-type: connect to GND, turn on (with 1) to pull down to 0 p-type: connect to +2.9V, turn on (with 0) to pull up to 1 Basic gates: NOT, NOR, NAND Logic functions are usually expressed with AND, OR, and NOT DeMorgan's Law Convert AND to OR (and vice versa) by inverting inputs and output

Building Functions from Logic Gates Combinational Logic Circuit output depends only on the current inputs stateless Sequential Logic Circuit output depends on the sequence of inputs (past and present) stores information (state) from past inputs We'll first look at some useful combinational circuits, then show how to use sequential circuits to store information.

Decoder 2-bit decoder n inputs, 2n outputs exactly one output is 1 for each possible input pattern 2-bit decoder Uses of decoder: convert memory/register address to a control line that selects that location convert an opcode to one of n control lines

Multiplexer (MUX) 4-to-1 MUX n-bit selector and 2n inputs, one output output equals one of the inputs, depending on selector Another view: decode S, and AND each output with one of the MUX inputs. Also explain multi-bit inputs. Uses of multiplexer: select which input to use for function select which computed value to pass to next stage (or to place on bus) 4-to-1 MUX

Mux (cont.) A B C D Out S0 S1 In general, a MUX has 2n data inputs n select (or control) lines and 1 output. It behaves like a channel selector. S[1:0] A B C D Out A 4-to-1 MUX: Out takes the value of A,B, C or D depending on the value of S (00, 01, 10, 11)

Adder Half Adder Full Adder Half-adder truth table 2 inputs 2 outputs: sum and carry Full Adder performs the addition in column i 3 inputs: ai, bi and ci 2 outputs: si and ci+1 ci is the carry in from bit position i-1 ci+1 is the carry out to bit position i+1 Half-adder truth table

Full Adder Add two bits and carry-in, produce one-bit sum and carry-out. A B Cin S Cout 1 A half-adder is one that doesn't take a carry-in. Sum is one when 1 or 3 inputs are one. Carry-out is one when 2 or 3 inputs are one.

Full Adder (cont) where - verify that this corresponds to the gate-level implementation.

Four-bit Adder 1010 Cin 0101 A + 1101 B 10010 S This is called a "ripple-carry" adder. The sum becomes valid as the carry ripples its way from the low bit to the high bit. How many gate delays until the output is settled?

Logical Completeness Can implement ANY truth table with AND, OR, NOT. 1 1. AND combinations that yield a "1" in the truth table. 2. OR the results of the AND gates. Note the use of the bubbles (NOT) in the input.