System Architecture Directions for Networked Sensors

Its different !! Complete systems on a chip Integrated low-power communications Devices that interact with the physical world Microcontrollers with more than just storage and processing capabilities

Network Sensor Characteristics Small physical size and low power consumptions Concurrency-intensive operations Limited Physical Parallelism and Controller Hierarchy Diversity in Design and Usage Robust Operation Slide 10

Network Sensor Schematic Diagram

Power Characteristics Three modes Active Idle Inactive In the cost of transmitting and receiving a bit the processor can execute 100 instructions

TinyOS Event based model High concurrency Asynchronous communication Elements of TinyOS Tiny scheduler Simple FIFO scheduler Bounded size scheduling data structure Power aware Components Command Handlers Event Handlers Frame Threads

Components Describe resources they provide and require Communication across components take place through a function call – but non-blocking Classified as Hardware abstraction Synthetic hardware High level software

Components (2) Commands Higher level to lower level Asynchronous request Provides status information to caller Signals Lower level to higher level Event handlers Invoked to deal with hardware events Lower level components have handlers connected to hardware events

Components (3) Threads Perform primary work Atomic and run to completion Do not block or spin wait

Evaluation Entire application size – 226 bytes data memory and 3kB instruction memory Posting thread and context switching – 6 bytes moving time Propagation delay - 90s Supports data rates of 25Kbps Implemented on source based multi- hop routing, active-badge-like location detection and sensor network monitoring applications. Slide 3

Advantages/Features Precursor to architectural innovations for network sensor systems Single microcontroller can support multiple data flows Provides means to predict impact of architectural changes in microcotrollers Supports reconfiguration and hence is versatile

Advantages/Features (2) Rids the programmer from having to write own scheduler/dispatcher Provides extensive static information to remove overhead and analyze performance

Related Work Real time embedded OS – PalmOS, WinCE Real time executives – Creek, pOSEK Piconet and Active Badge Location Systems

Issues Does not speak about real-time gaurantees Run-to-completion semantics – what about priority, pre-emption?? No mention of Testing / Debugging support Reliable communication – no buffer Security mechanism – maincontroller can be reprogrammed over the network

Summary Event driven operating system Support for efficient modularity and concurrency intensive operations 178 bytes of memory Propogation delay 1.25 bytes memory time Context switch 6 bytes memory time Groundwork for architectural advances

Questions ???

Thank You Vishal Kudchadkar