CERN MIC Support for HEP Microelectronics Designers A. Marchioro / CERN-PH EUDET Meeting - December 14 th 2005.

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Presentation transcript:

CERN MIC Support for HEP Microelectronics Designers A. Marchioro / CERN-PH EUDET Meeting - December 14 th 2005

A. Marchioro - CERN/PH2 CERN MIC Support Activities Technology Design Tools Submission and post-design support

A. Marchioro - CERN/PH3 Why a common service The entire HEP community is, even if agglomerated, only a very small customer of a modern foundry  Total LHC volume (over 5 years) was about 2 days of production of a medium size supplier Cost of newer technology is increasing very fast  ¼  m 1 X, 130 nm 4-5 X, 90 nm 9-10 X Majority of designs in community are not “commodity” design  Most HEP chips are Analog and Mixed Signal  Most chips require special care for rad-tolerance

A. Marchioro - CERN/PH4 Technology support Technical  Validation of rad-tolerant technologies and design techniques  Libraries, design kit, tools, training and design guide-lines  Sharing of resources (e.g. general purpose layout for special devices, analog and digital blocks) Commercial  Organization of contract for entire HEP community to support ¼  m, 130 nm and 90 nm CMOS technologies  Negotiation of common tools and IPs from third party vendors  Global Non-Disclosure-Agreement framework for entire community whenever applicable  Price competitive or below other silicon brokerage services More flexible prototyping Contract to cover possible commercial fall-out developments

A. Marchioro - CERN/PH5 Design Tools Designing in 130 nm is NOT simple any longer  Numerous manufacturing constraints  Will even be more difficult in 90 nm Common tools and a well defined “design-flow” are absolutely necessary Digital library designed and characterized for radiation tolerance is absolutely necessary Centralization of “expensive” (but perhaps rarely used) CAE tools is mandatory to support smaller design groups

A. Marchioro - CERN/PH6 Submission and post-design support MPW service to run 2-3 runs/year, according to demand  Rapid turn-around: 8-10 weeks was achieved frequently for ¼ micron Production services  On-demand  Support to carry design from prototyping to production  Organization of private and shared production runs Post-design support  Special wafer handling (bump-bonding, special surface treatments etc.)  Dicing, Packaging  Failure analysis

A. Marchioro - CERN/PH7 CERN Activities: Submissions

A. Marchioro - CERN/PH8 Technologies from CERN Market Survey Baseline 130 nm CMOS with few options for analog design  8 metals  Several (but not all) transistor types  Resistors  Metal-to-Metal capacitors (not an option any longer) Baseline 90 nm CMOS with strong preference for 8” wafers BiCMOS (SiGe) as option but not included in price adjudication formula Both available for general usage hopefully by mid 2006

A. Marchioro - CERN/PH9 Conclusions CERN will organize with EUDET support a general service for people in the HEP community intending to use advanced CMOS technologies Service is oriented to real production (albeit often small) and not just to “academic” research, but is capable of supporting both A common service makes sense and will succeed if the community will remain united and work harmoniously for the global advantage and not for the local benefit

A. Marchioro - CERN/PH10 Practical next step Register with CERN as DSM user  Provide list of interested designers  Area of interest of design (application)  Target technology  Project schedule (proto-1, proto-2, pre-production, final volume when available)  Contact person for technical issues  Administrative contact for legal issues (NDAs etc.) Soon a registration form will be sent to interested users

A. Marchioro - CERN/PH11 Don‘t forget this when adjudicationg...