Beijing Embedded System Key Lab

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Presentation transcript:

Beijing Embedded System Key Lab Power Amplifier Spring 2005 Beijing Embedded System Key Lab

Linear/Nonlinear PA? Nonconstant envelop Constant envelop modulation BPSK QPSK QAM GMSK FSK Nonlinear PA High Efficiency Linear PA Low Efficiency

Effect of nonlinear PA on nonconstant envelop signal Spectral Regrowth Effect of nonlinear PA on nonconstant envelop signal Spectrum at output of nonlinear PA Original Signal Spectrum

Power Amplifier Efficiency For ideal PA : The Drain Efficiency The Power Added Efficiency(PAE): The overall efficiency:

Basic Amplification: Use RFC ( RF Chock) to in a common source stage to drive the load

Matching

Typical PA Performance

Linear and Nonlinear PA Linear/Nonlinear distinction The fraction of the RF cycle for which the transistor conducts.

Stability Consideration Ps:Stable circle on Smith chart is the general tool

Operating Power Gain Given the power gain,drawing the power gain circle,and select in the stable region. Calculate ,determine if a conjugate match is in the stable region.If it’s not stable,we can choose the arbitrarily,or according VSWR.

Constant VSWR Circle

DC Bias Selection Active bias network for a BJT Low-noise,low-power : A Low-noise,higher power-gain : B High Output Power : C Higher output power and higher efficiency : D

Power Amplifier Classes Class A: conduction angle 360 Class B: conduction angle 180 Class AB: conduction angle >180 Class C: conduction angle <180 Class F: an extension of class C Class E: switch mode

Class A Power Amplifiers Maximum efficiency of class A PA: Assume drain(collector) voltage is a sinusoid having Vpp of 2Vdd.The power deliver to matching network is .And for Vx to reach 2Vdd,the RFC nust provide a current of . Thus, the maximum efficiency is 50%.

Push-pull output stage The push-pull stage of above usually used in low-frequency power amplifier. The efficiency is better than class A PA.

Class A Power Amplifiers RFC RFC

Class A Power Amplifiers Maximum output power Efficiency

Class B Stage using a transform The maximum voltage swing at X and Y is 2Vdd,And the equivalent resistance seen at each of X and Y is n2RL The total input power of T1 is given by Pin=VDD2/2 n2RL and Psup=2VDD2/(pn2RL ) . 1. The drawback of the class B amplifier shown above is the need for a low-loss high-frequency transformer. 2. The conduction angle is 180. Such a circuit is quite nonlinear.

Class B, AB Power Amplifiers

Class C PAs M1 turns On if . The efficiency formula : The power delivered to the load :

Ideas for Raising Efficiency Suppose the matching network is designed such that its input impedance is low at the fundamental frequency and quite high at the second harmonics.The drain voltage exhibits sharper edges than a sinusoid does,raising the efficiency. But the matching network becomes quite complex and lossy.

Class C Power Amplifier RFC

High Efficiency PA Class A

Class E PAs Class E stages are nonlinear amplifiers that achieve efficiencies approaching 100% while delivering full power. It’s a “switching power amplifier”. The voltage applied to the gate of M1 must approximate a rectangular waveform.And the switch on-resistance must be low.

Class E Pas (Cont.) As the switch turns off,Vx remains low long enough for the current to drop to zero. Vx reaches zero just before the switch turns on. is also near zero when the switch turns on. After the switch turns off, the load network operates as a damped second-order system. 1. Class E stages exhibit a trade-off between efficiency and output harmonic content. For low harmonic, the Q of the output network must be higher than the typically required be the second and third conditions.

Class E Power Amplifiers Switch mode Approaching 100% efficiency

Class F PAs The idea of harmonics termination for a class A stage can be extened to nonlinear amplifiers as well. It can be proved that the peak efficiency of class F amplifiers is equal to 88% for third-harmonics peaking and 85% for for second-harmonics peaking.

Class F Power Amplifiers RFC L3C3 tuned to the 2nd or 3rd harmonics Peak efficiency 88% for 3rd harmonics peaking 85% for for 2nd harmonics peaking.

Power amplifier examples [*] B. Razavi

Power amplifier examples [*] B. Razavi

Power amplifier examples

Nonlinear impedance matching Maximum power transfer does not correspond to maximum efficiency. The matching can be obtained roughly using small-signal approximation, but modifying these for maximum large-signal efficiency requires a great deal of trial and error.

Large-Signal Impedance Matching 1. The load-pull technique has been widely used in power amplifier design. 2. But, three drawbacks : (1) One device size for one measurement. (2)The measurement only for one frequency. (3)The load-pull algorithm does not necessarily provide peaking at higher harmonics, it cannot predict the efficiency and output power in the presence of multiharmonics terminattion. In a “load-pull” test, the output power is measured and plotted as a function of the complex load seen by the transistor. As Z1 varies so does Zin ,a second tuer between the signal generator and the transistor is needed.

Linearization Techniques Most linear power Amp. Class A of efficiency around %30 to %40 for portable devices. To improve efficiency Linearization after nonlinear PAs. Linearization method: feedford feedback envelope elimination and restoration LINC

Liberalization Technology: Feedforward The suppression of the magnitude of the IM products in Vout: E

Liberalization Technology: Feedback

Envelope Elimination and Restoration

Linearization using non-linear circuits LINC Technology (1) (2)

Limitations of integrated CMOS Power Amplifier Device Breakdown Voltage Low voltage swing Sub-μCMOS process has low oxide breakdown Low current driving capabilities Larger device required for a given current Larger Capacitances Tuning is more difficult Substrate Coupling with the RF Blocks PA injects more currents into substrate Lower Q passive elements

CMOS Technology for RF is for applications Conclusions CMOS Technology for RF is for applications Integrated with significant digital circuits Lowest cost Moderate radio performance Accurate RF models are critical for RF CMOS circuit design Continuous process improvement enables CMOS RF capability