1. 1 EKT 441 MICROWAVE COMMUNICATIONS CHAPTER 6: MICROWAVE AMPLIFIERS

2. 2 INTRODUCTION Most RF and microwave amplifiers today used transistor devices such as Si or SiGe BJTs, GaAs HBTs, GaAs or InP FETs, or GaAs HEMTs. Microwave transistor amplifiers are rugged, low cost, reliable and can be easily integrated in both hybrid an monolithic integrated circuitry.

3. 3 General Amplifier Block Diagram Input and output voltage relation of the amplifier can be modeled simply as: V cc PLPL P in The active component v i (t) v s (t) v o (t) DC supply ZLZL VsVs ZsZs Amplifier Input Matching Network Output Matching Network i i (t) i o (t)

4. 4 Amplifier Classification Amplifier can be categorized in 2 manners. According to signal level: Small-signal Amplifier. Power/Large-signal Amplifier. According to D.C. biasing scheme of the active component: Class A. Class B. Class AB. Class C. There are also other classes, such as Class D (D stands for digital), Class E and Class F. These all uses the transistor/FET as a switch. There are also other classes, such as Class D (D stands for digital), Class E and Class F. These all uses the transistor/FET as a switch. Our approach in this chapter

5. 5 Small-Signal Versus Large-Signal Operation ZLZL VsVs ZsZs Sinusoidal waveform Usually non-sinusoidal waveform Large-signal: Nonlinear Small-signal: Linear v o (t) v i (t)

6. 6 Small-Signal Amplifier (SSA) All amplifiers are inherently nonlinear. However when the input signal is small, the input and output relationship of the amplifier is approximately linear. This linear relationship applies also to current and power. An amplifier that fulfills these conditions: (1) small-signal operation (2) linear, is called Small-Signal Amplifier (SSA). SSA will be our focus. If a SSA amplifier contains BJT and FET, these components can be replaced by their respective small-signal model, for instance the hybrid-Pi model for BJT. When v i (t)  0 (< 2.6mV) (1.1) Linear relation

7. 7 Example 1.1 - An RF Amplifier Schematic (1) ZLZL VsVs ZsZs Amplifier Input Matching Network Output Matching Network DC supply RF power flow

8. 8 Typical RF Amplifier Characteristics To determine the performance of an amplifier, the following characteristics are typically observed. 1. Power Gain. 2. Bandwidth (operating frequency range). 3. Noise Figure. 4. Phase response. 5. Gain compression. 6. Dynamic range. 7. Harmonic distortion. 8. Intermodulation distortion. 9. Third order intercept point (TOI). Important to small-signal amplifier Important parameters of large-signal amplifier (Related to Linearity)

9. 9 Power Gain For amplifiers functioning at RF and microwave frequencies, usually of interest is the input and output power relation. The ratio of output power over input power is called the Power Gain (G), usually expressed in dB. There are a number of definition for power gain as we will see shortly. Furthermore G is a function of frequency and the input signal level. Power Gain (1.2)

10. 10 Why Power Gain for RF and Microwave Circuits? (1) Power gain is preferred for high frequency amplifiers as the impedance encountered is usually low (due to presence of parasitic capacitance). For instance if the amplifier is required to drive 50Ω load the voltage across the load may be small, although the corresponding current may be large (there is current gain). For amplifiers functioning at lower frequency (such as IF frequency), it is the voltage gain that is of interest, since impedance encountered is usually higher (less parasitic). For instance if the output of IF amplifier drives the demodulator circuits, which are usually digital systems, the impedance looking into the digital system is high and large voltage can developed across it. Thus working with voltage gain is more convenient. Power = Voltage x Current

11. 11 Why Power Gain for RF and Microwave Circuits? (2) Instead on focusing on voltage or current gain, RF engineers focus on power gain. By working with power gain, the RF designer is free from the constraint of system impedance. For instance in the simple receiver block diagram below, each block contribute some power gain. A large voltage signal can be obtained from the output of the final block by attaching a high impedance load to it’s output. LO IF Amp. BPF LNA BPF RF Portion (900 MHz) IF Portion (45 MHz) RF signal power 1  W 15  W IF signal power 75  W 7.5 mW 400Ω t v(t) 4.90 V

12. 12 Harmonic Distortion (1) ZLZL VsVs ZsZs When the input driving signal is small, the amplifier is linear. Harmonic components are almost non-existent. Small-signal operation region P out P in

13. 13 Harmonic Distortion (2) ZLZL VsVs ZsZs When the input driving signal is too large, the amplifier becomes nonlinear. Harmonics are introduced at the output. Harmonics generation reduces the gain of the amplifier, as some of the output power at the fundamental frequency is shifted to higher harmonics. This result in gain compression seen earlier! Harmonics generation reduces the gain of the amplifier, as some of the output power at the fundamental frequency is shifted to higher harmonics. This result in gain compression seen earlier! f f1f1 f harmonics f1f1 2f 1 3f 1 4f 1 0 P out P in

14. 14 Power Gain, Dynamic Range and Gain Compression Dynamic range (DR) 1dB compression Point (P in_1dB ) Saturation Device Burn out Ideal amplifier 1dB Gain compression occurs here Noise Floor -70-60-50-40-30-20-10010 P in (dBm) 20 P out (dBm ) -20 -10 0 10 20 30 -30 -40 -50 -60 Power gain G p = P out (dBm) - P in (dBm) = -30-(-43) = 13dB Linear Region Nonlinear Region Nonlinear Region P in P out Input and output at same frequency

15. 15 Bandwidth Power gain G versus frequency for small-signal amplifier. f / Hz0 G/dB 3 dB Bandwidth P o dBm P i dBm P o dBm P i dBm

16. 16 Noise Figure (F) VsVs The amplifier also introduces noise into the output in addition to the noise from the environment. Assuming small-signal operation. Noise Figure (F)= SNR in /SNR out Since SNR in is always larger than SNR out, F > 1 for an amplifier which contribute noise. SNR: Signal to Noise Ratio SNR: Signal to Noise Ratio Smaller SNR in Larger SNR out ZsZs ZLZL

17. 17 Power Gain Definition From the power components, 3 types of power gain can be defined. G P, G A and G T can be expressed as the S-parameters of the amplifier and the reflection coefficients of the source and load networks. Refer to Appendix 1 for the derivation. The effective power gain (2.1a) (2.1b) (2.1c)

18. 18 Naming Convention ZLZL VsVs ZsZs Amplifier 2 - port Network  in  out Source Network Load Network ss LL In the spirit of high- frequency circuit design, where frequency response of amplifier is characterized by S-parameters and reflection coefficient is used extensively instead of impedance, power gain can be expressed in terms of these parameters. In the spirit of high- frequency circuit design, where frequency response of amplifier is characterized by S-parameters and reflection coefficient is used extensively instead of impedance, power gain can be expressed in terms of these parameters.

19. 19 TWO-PORT POWER GAIN Figure 7.1: A two port network with general source and load impedance.

20. 20 TWO-PORT POWER GAIN Power Gain = G = P L / P in is the ratio of power dissipated in the load Z L to the power delivered to the input of the two-port network. This gain is independent of Z s although some active circuits are strongly dependent on Z S. Available Gain = G A = P avn / P avs is the ratio of the power available from the two-port network to the power available from the source. This assumes conjugate matching in both the source and the load, and depends on Z S but not Z L. Transducer Power Gain = G T = P L / P avs is the ratio of the power delivered to the load to the power available from the source. This depends on both Z S and Z L. If the input and output are both conjugately matched to the two-port, then the gain is maximized and G = G A = G T

21. 21 TWO-PORT POWER GAIN From the definition of S parameters: [7.1a] [7.1b] Eliminating V 2 - from [7.1a]: [7.2] [7.3]

22. 22 TWO-PORT POWER GAIN By voltage division: Using: Solving for V 1 + : [7.4] [7.5] [7.6]

23. 23 TWO-PORT POWER GAIN The average power delivered to the network: The power delivered to the load is: [7.7] [7.8] [7.9]

24. 24 TWO-PORT POWER GAIN The power gain can be expressed as: The available power from the source: The available power from the network: [7.10] [7.11] [7.12]

25. 25 TWO-PORT POWER GAIN The power available from the network: The available power gain: The transducer power gain: [7.13] [7.14] [7.15]

26. 26 Summary of Important Power Gain Expressions and the Gain Dependency Diagram Note: All G T, G P, G A,  1 and  2 depends on the S- parameters. (2.2a) (2.2c) (2.2d) (2.2e) ss LL  in  out GAGA GPGP GTGT The Gain Dependency Diagram (2.2b)

27. 27 TWO-PORT POWER GAIN A special case of the transducer power gain occurs when both input and output are matched for zero reflection (in contrast to conjugate matching). Another special case is the unilateral transducer power gain, G TU where S 12 =0 (or is negligibly small). This nonreciprocal characteristic is common to many practical amplifier circuits. Γ in = S 11 when S 12 = 0, so the unilateral transducer gain is: [7.16] [7.17]

28. 28 TWO-PORT POWER GAIN Figure 7.2: The general transistor amplifier circuit.

29. 29 TWO-PORT POWER GAIN The separate effective gain factors: [7.18a] [7.18b] [7.18c]

30. 30 TWO-PORT POWER GAIN If the transistor is unilateral, the unilateral transducer gain reduces to G TU = G S G 0 G L, where: [7.19c] [7.19b] [7.19a]

31. 31 Example 1 – Familiarization with the Gain Expressions An RF amplifier has the following S-parameters at f o : s 11 =0.3<-70 o, s 21 =3.5<85 o, s 12 =0.2<-10 o, s 22 =0.4<-45 o. The system is shown below. Assuming reference impedance (used for measuring the S- parameters) Z o =50 , find: (a) G T, G A, G P. (b) P L, P A, P inc. Amplifier Z L =73  40  5<0 o

32. 32 Example 1 Cont... Step 1 - Find  s and  L. Step 2 - Find  1 and  2. Step 3 - Find G T, G A, G P. Step 4 - Find P L, P A. Try to derive These 2 relations Again note that this is an analysis problem. Again note that this is an analysis problem.

33. 33 STABILITY In the circuit of Figure 7.2, oscillation is possible if either the input or output port impedance has the negative real part; this would imply that |Γ in |>1 or |Γ out |>1. Γ in and Γ out depends on the source and load matching networks, the stability of the amplifier depends on Γ S and Γ L as presented by matching networks. Unconditionally stable: The network is unconditionally stable if |Γ in | < 1 and |Γ out | < 1 for all passive source and load impedance (ex; |Γ S | < 1 and |Γ| < 1). Conditionally stable: The network is conditionally stable if |Γ in | < 1 and |Γ out | < 1 only for a certain range of passive source and load impedance. This case also referred as potentially unstable. The stability condition of an amplifier circuit is usually frequency dependent.

34. 34 STABILITY CIRCLES The condition that must be satisfied by Γ S and Γ L if the amplifier is to be unconditionally stable: [7.20a] [7.20b] The determinant of the scattering matrix: [7.21]

35. 35 STABILITY CIRCLES The output stability circles: The input stability circles: [7.22a] [7.22b] [7.23a] [7.23b]

36. 36 STABILITY CIRCLES Figure 7.3: Output stability circles for conditionally stable device. (a) |S 11 | 1

37. 37 STABILITY CIRCLES If the device is unconditionally stable, the stability circles must be completely outside (or totally enclose) the Smith chart. [7.24a] [7.24b]

38. 38 STABILITY TEST Rollet’s condition: the auxiliary condition: the μ test: [7.25] [7.26] [7.27]

39. 39 Example 2 The S parameters for the HP HFET-102 GaAs FET at 2 GHz with a bias voltage of Vgs = 0 are given as follow (Z 0 = 50 Ohm): S 11 = 0.894 < -60.6 S 21 = 3.122 < 123.6 S 12 = 0.020 < 62.4 S 22 = 0.781 < -27.6 Determine the stability of this transistor using the K-  test and the μ test, and plot the stability circles on the Smith Chart

40. 40 Example 2 For the μ test: Remember, criteria for unconditional stability is: For the K-  test:

41. 41 Example 2 For the μ test: Calculation results: For the K-  test: Which indicates potential instability

42. 42 Example 2 Input stability circle and radius Calculation for the input and output stability circles: Output stability circle center and radius:

43. 43 STABILITY Figure 7.4: Example of stability circles

44. 44 SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN Maximum power transfer from the input matching network to the transistor and the maximum power transfer from the transistor to the output matching network will occur when: Then, assuming lossless matching sections, these conditions will maximize the overall transducer gain: [7.28a] [7.28b] [7.29]

45. 45 SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN In the general case with a bilateral transistor, Γ in is affected by Γ out, and vice versa, so that the input and output sections must be matched simultaneously. [7.30a] [7.30b]

46. 46 SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN The solution is: [7.31a] [7.31b]

47. 47 SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN The variables are defined as: [7.32a] [7.32b] [7.32c] [7.32d]

48. 48 SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN When S 12 = 0, it shows that Γ S = S 11 * and Γ L = S 22 *, and the maximum transducer gain for unilateral case: The maximum stable gain with K = 1: [7.33] [7.34] [7.35] When the transistor is unconditionally stable, K > 1, and the max transducer power gain can be simply re-written as:

49. 49 Example 3 Design an amplifier for a maximum gain at 4.0 GHz. Calculate the overall transducer gain, G T, and the maximum overall transducer gain G Tmax. The S parameters for the GaAs FET at 4 GHz given as follow (Z 0 = 50 Ohm): S 11 = 0.72 < -116 o S 21 = 2.60 < 76 o S 12 = 0.03 < 57 o S 22 = 0.73 < -68 o

50. 50 Example 3 (Cont) Determine the stability of this transistor using the K-  test Since |  | 1, the transistor is unconditionally stable at 4.0 GHz.

51. 51 Example 3 (cont) For the maximum gain, we should design the matching sections for a conjugate match to the transistor. Thus, Γ S = Γ in * and Γ L = Γ out *, Γ S and Γ L can be determined from;

52. 52 Example 3 So the overall maximum transducer gain will be; The effective gain factors can calculated as:

53. 53 UNILATERAL FOM In many practical cases |S 12 | is small enough to be ignored, the device then can be assumed to be unilateral, which greatly simplifies design procedure Error in the transducer gain caused by approximating |S 12 | as zero is given by the ratio G T /G TU, and be bounded by: Where U is defined as the unilateral figure of merit

54. 54 Example 4 An FET is biased for minimum noise figure, and has the following S parameters at 4 GHz: S 11 = 0.60 < -60 o S 21 = 1.90 < 81 o S 12 = 0.05 < 26 o S 22 = 0.50 < -60 o For design purposes, assume the device is unilateral and calculate the max error in G T resulting from this assumption.

55. 55 Example 4 (cont) To compute the unilateral figure of merit; Then the ratio of G T /G TU is bounded as;

56. 56 Example 4 (cont) In dB, this is; Where G T and G TU are now in dB. Thus we should expect less than about ± 0.5 dB error in gain.

57. 57 CONSTANT GAIN CIRCLES In many cases it is desirable to design for less than the max obtainable gain, to improve bandwidth or to obtain a specific value for an amplifier gain. Mismatches are purposely introduced to reduce the overall gain Procedure is facilitated by plotting constant gain circles on the Smith Chart Represents loci of Γ S and Γ L, that give fixed values of G S and G L. To simplify the discussion, we will only treat the case of a unilateral device

58. 58 CONSTANT GAIN CIRCLES The expression for the G S and G L for the unilateral case is given by: These gains are maximized when Γ S = S 11 * and Γ L = S 22 * :

59. 59 CONSTANT GAIN CIRCLES Now we define normalized gain factors g S and g L as; Thus we have that: 0 ≤ g S ≤ 1, and 0 ≤ g L ≤ 1. A fixed value of g S and g L represents circles in the Γ S and Γ L planes.

60. 60 CONSTANT GAIN CIRCLES Input constant gain circles: Output constant gain circles: [7.37a] [7.37b] [7.38a] [7.38b]

61. 61 Example 5 Design an amplifier to have a gain of 11 dB at 4 GHz. Plot constant gain circles for G S = 2 dB and 3 dB; and G L = 0 dB and 1 dB. The FET has the following S parameters (Z 0 = 50 Ω): S 11 = 0.75 < -120 o S 21 = 2.50 < 80 o S 12 = 0.00 < 0 o S 22 = 0.60 < -85 o

62. 62 Example 5 (cont) Since S 12 = 0 and |S 11 | < 1 and |S 22 | < 1, the transistor is unilateral and unconditionally stable. We calculate the max matching section gains as; The gain of the mismatched transistor is;

63. 63 Example 5 (cont) So the max unilateral transducer gain is Thus we have 2.5 dB more available gain than required by specs, since the design only requires 11 dB gain. However, the question also asked us to analyze the effect of having: Condition 1: G S = 3 dB and G L = 0 dB Condition 2: G S = 2 dB and G L = 1 dB (Note that these conditions must happens at the same time in order to keep the gain at 11 dB.)

64. 64 Example 5 (cont) For condition 1 (input side), when G S = 3 dB:

65. 65 Example 5 (cont) For condition 1 (output side), when G L = 0 dB:

66. 66 Example 5 (cont)

67. 67 LOW NOISE AMPLIFIER DESIGN In receiver applications especially, it is often required to have a preamplifier with as low a noise figure as possible since, the first stage of a receiver front end has the dominant effect on the noise performance of the overall system. Generally it is not possible to obtain both minimum noise figure and maximum gain for an amplifier, so some sort of compromise must be made. This can be done by using constant gain circles and circles of constant noise figure to select a usable trade of between noise figure and gain. [7.39]

68. 68 LOW NOISE AMPLIFIER DESIGN For a fixed noise figure, F, the noise figure parameter, N, is given as: The circles of constant noise figure: [7.40] [7.41a] [7.41b]

69. 69 Example 6 An GaAs FET amplifier is biased for minimum noise figure and has the following S-parameters (Z 0 = 50 Ω): S 11 = 0.75 < -120 S 21 = 2.50 < 80 S 12 = 0.00 < 0 S 22 = 0.60 < -85 Γ opt = 0.62 < 100 F min = 1.6 dB R N = 20 Ω For design purposes, assume the unilateral. Then design an amplifier having 2.0 dB noise figure with the max gain that is compatible with this noise figure.

70. 70 Example 6 (cont) Next use the formulas to compute the center and radius of the 2 dB noise figure circle: The gain of the mismatched transistor is

71. 71 Example 6 (cont) The noise figure circle is plotted in the figure. Min noise figure (F min = 1.6 dB) occurs for Γ S = Γ opt = 0.62<100 o It can be seen that G S = 1.7 dB gain circle just intersects the F = 2.0 dB noise figure circle, and any higher gain will result in a worse noise figure. G S (dB)gSgS CSCS RSRS 1.00.8050.52<60 o 0.300 1.50.9040.56<60 o 0.205 1.70.9460.58<60 o 0.150

72. 72 Example 6 (cont) For the output section we choose Γ L = S 22 * = 0.5<60 o for a max G L of:

73. 73 Example 6 (cont)