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**Chapter 16 CMOS Amplifiers**

16.1 General Considerations 16.2 Operating Point Analysis and Design 16.3 CMOS Amplifier Topologies 16.4 Common-Source Topology 16.5 Summary and Additional Examples 16.6 Chapter Summary

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Chapter Outline CH 16 CMOS Amplifiers

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**Example: Desired I/O Impedances**

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**Method to Measure the I/O Impedances**

To measure Rin(Rout), deactivate all the other independent sources in the circuit and find the ratio of vX/iX. CH 16 CMOS Amplifiers 4

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**Example: Input Impedance of a Simple Amplifier**

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**The Concept of Impedance at a Node**

When the other node of a port is grounded, it is more convenient to use the concept of impedance at a node. CH 16 CMOS Amplifiers 6

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**Example: Impedance Seen at Drain**

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**Example: Impedance Seen at Source**

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**Impedance Summary Looking into the gate, we see infinity.**

Looking into the drain, we see rO if the source is (ac) grounded. Looking into the source, we see 1/gm if the gate is (ac) grounded and rO is neglected. CH 16 CMOS Amplifiers 9

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**Bias and Signal Levels for a MOS Transistor**

Bias point analysis establishes the region of operation and the small-signal parameters. On top of the bias point, small signals are applied to the circuit. CH 16 CMOS Amplifiers 10

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**General Steps in Circuit Analysis**

First, the effects of constant voltage/current sources are analyzed when signal sources are deactivated. Second, small-signal analysis is done when constant sources are set to zero. CH 16 CMOS Amplifiers 11

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**Simplification of Supply Voltage Notation**

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**Example: Amplifier Driven by a Microphone**

Since the DC (average) value is at zero, and 20mV is not sufficient to turn on M1, M1 is off and Vout is at VDD. CH 16 CMOS Amplifiers 13

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**Example: Amplifier with Gate Tied to VDD**

Since the gate voltage level is fixed at VDD, no signal current will be produced my M1, leading to no amplification. CH 16 CMOS Amplifiers 14

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**Example: Amplifier with Gate Bias**

With proper value of VB, M1 can operate in the desired saturation region and amplify the incoming voice signal. CH 16 CMOS Amplifiers 15

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Simple Biasing In (a), VGS=VDD, whereas in (b) VGS equals to a fraction of VDD. CH 16 CMOS Amplifiers 16

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**Example: Bias Current and Maximum RD**

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Capacitive Coupling Capacitive coupling is used to block the zero DC output value of the microphone and pass the voice signal to the amplifier. CH 16 CMOS Amplifiers 18

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**Biasing with Source Degeneration**

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**Example: ID and Maximum RD for Source Degeneration Biasing**

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**Example: Maximum W/L and Minimum RS**

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Self-Biased MOS Stage The gate voltage is provided by the drain with no voltage drop across RG and M1 is always in saturation. CH 16 CMOS Amplifiers 22

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**Example: Self-Biased MOS Stage**

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**Example: PMOS Stage with Biasing**

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**Example: PMOS Stage with Self-Biasing**

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**Good Example of Current Source**

As long as a MOS transistor is in saturation region and λ=0, the current is independent of the drain voltage and it behaves as an ideal current source seen from the drain terminal. CH 16 CMOS Amplifiers 26

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**Bad Example of Current Source**

Since the variation of the source voltage directly affects the current of a MOS transistor, it does not operate as a good current source if seen from the source terminal CH 16 CMOS Amplifiers 27

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**Possible I/O Connections to a MOS Transistor**

Of all the possible I/O connections to a MOS transistor, only (a,d), (a,e) and (b,d) are functional. CH 16 CMOS Amplifiers 28

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**Common Source (CS) Stage**

If the input is applied to the gate and the output is sensed at the drain, the circuit is called a “common-source” (CS) stage. CH 16 CMOS Amplifiers 29

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**Small-Signal Model of CS Stage**

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Example: CS Stage CH 16 CMOS Amplifiers 31

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**Example: Faulty CS Stage Design**

However, no solution exists since M1 is out of the saturation region (VDD-IDRD<VGS-VTH). CH 16 CMOS Amplifiers 32

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**CS Stage I/O Impedance Calculation**

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**CS Stage Including Channel-Length Modulation**

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**Example: ½ Gain No Channel-Length Modulation**

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Example: RD → ∞ CH 16 CMOS Amplifiers 36

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**CS Stage with Current Source Load**

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**Example: CS Stage with Current Source Load**

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**CS Stage with Diode-Connected Load**

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**Example: CS Stage with Diode-Connected PMOS**

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**CS Stage with Source Degeneration**

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**Example: CS Stage with Source Degeneration**

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**Example: Degeneration Resistor**

Without Degeneration With Degeneration CH 16 CMOS Amplifiers 43

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**Effective Transconductance**

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**Effect of Transistor Output Resistance**

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**Stage with Explicit Depiction of rO**

Sometimes, the transistor’s output resistance is explicitly drawn to emphasize its significance. CH 16 CMOS Amplifiers 46

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**Example: NMOS Current Source Design**

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**Example: Output Resistance of CS Stage with Degeneration I**

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**Example: Output Resistance of CS Stage with Degeneration II**

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**Example: Failing Microphone Amplifier**

No Amplification!! Because of the microphone’s small low-frequency output resistance (100Ω), the bias voltage at the gate is not sufficient to turn on M1. CH 16 CMOS Amplifiers 50

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Capacitive Coupling To fix the problem in the previous example, a method known as capacitive coupling is used to block the DC content of the microphone and pass the AC signal to the amplifier. CH 16 CMOS Amplifiers 51

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**Capacitive Coupling: Bias Analysis**

Since a capacitor is an open at DC, it can be replaced by an open during bias point analysis. CH 16 CMOS Amplifiers 52

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**Capacitive Coupling: AC Analysis**

Since a capacitor is a short at AC, it can be replaced by a short during AC analysis. CH 16 CMOS Amplifiers 53

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**Capacitive Coupling: I/O Impedances**

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**Example: Amplifier with Direction Connection of Speaker**

This amplifier design still fails because the solenoid of the speaker shorts the drain to ground. CH 16 CMOS Amplifiers 55

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**Example: Amplifier with Capacitive Coupling at I/O**

This amplifier design produces very little gain because its equivalent output resistance is too small. CH 16 CMOS Amplifiers 56

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**Source Degeneration with Bypass Capacitor**

It is possible to utilize degeneration for biasing but eliminate its effect on the small-signal by adding a bypass capacitor. CH 16 CMOS Amplifiers 57

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**Example: Source Degeneration with Bypass Capacitor Design**

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Concept Summary CH 16 CMOS Amplifiers 59

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Common-Gate Stage In a common-gate stage, the input is applied at the source while the output is taken at the drain. CH 16 CMOS Amplifiers 60

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**Small Signal Analysis of Common-Gate Stage**

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**Example: Common-Gate Stage Design**

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**Input Impedance of Common-Gate Stage**

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**The Use of Low Input Impedance**

The low input impedance of a common-gate stage can be used to impedance match a 50-Ω transmission line. CH 16 CMOS Amplifiers 64

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**Output Impedance of Common-Gate Stage**

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**Example: Alternate Av Expression of CG Stage**

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**CG Stage in the Presence of Finite Source Resistance**

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**Output Impedance of a General CG Stage**

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**CG and CS Stages Output Impedance Comparison**

Since when calculating the output impedance, the input voltage source of the CG stage is grounded, the result will be identical to that of a CS stage if the same assumptions are made for both circuits. CH 16 CMOS Amplifiers 69

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Example: AV and Rout λ = 0 λ > 0 CH 16 CMOS Amplifiers 70

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**Example: CG Stage Lacking Bias Current**

Although the capacitor C1 isolates the DC content of the signal source, it also blocks the bias current of M1, hence turning it OFF. CH 16 CMOS Amplifiers 71

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**Example: CG Stage with Source Shorted to Ground**

Although there is now a path for bias current to flow to ground, the signal current also goes with it, hence producing no gain. CH 16 CMOS Amplifiers 72

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**CG Stage with Proper Bias Circuitry**

R1 is used to provide a path for bias current to flow without directly shorting the source to ground. However, it also lowers the input impedance of the circuit CH 16 CMOS Amplifiers 73

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**Input Current Flowing Paths**

To maximize the useful current i2, R1 needs to be much larger than 1/gm. CH 16 CMOS Amplifiers 74

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**Example: CG with Complete Bias Network**

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Example: Min W/L CH 16 CMOS Amplifiers 76

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Source Follower Source follower sense the input at the gate and produces the output at the source. CH 16 CMOS Amplifiers 77

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**Source Follower’s Response to an Input Change**

As the input changes by a small amount, the output will follow the input and changes by a smaller amount, hence the name source follower. CH 16 CMOS Amplifiers 78

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**Small-Signal Model and Voltage Gain for Source Follower**

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**Example: Source Follower with Current Source**

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**Source Follower Acting as a Voltage Divider**

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**Complete Small-Signal Model with rO**

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**Example: Source Follower with a Real Current Source**

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**Example: Source Follower with a Real Current Source**

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**Output Resistance of Source Follower**

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**Example: Source Follower with Biasing**

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**Source Follower with Current Source Biasing**

In IC technology, source follower is often biased by a current source to avoid the bias current’s dependence on the supply voltage. CH 16 CMOS Amplifiers 87

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**Summary of MOS Amplifier Topologies**

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**Example: Common Source Stage I**

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**Example: Common Source Stage II**

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**Example: CS and CG Stages**

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**Example: Composite Stage I**

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**Example: Composite Stage II**

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Chapter Summary The impedances looking into the gate, drain, and source of a MOS are equal to ∞, rO and 1/gm respectively (under proper conditions). The transistor has to be properly biased before small-signal can be applied. Resistive path between the supply rails establishes the gate bias voltage. Only three amplifiers topologies are possible. CS stage provides moderate AV, high Rin and moderate Rout. Source degeneration improves linearity but lower AV. Source degeneration raises the Rout of CS stage considerably. CG stage provides moderate AV, low Rin and moderate Rout. AV for CS and CG stages are similar but for a sign. Source follower provides AV less than 1, high Rin and low Rout, serving as a good voltage buffer. CH 16 CMOS Amplifiers 94

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