COEN 180 Flash Memory. Floating Gate Fundamentals Floating Gate between control gate and channel in MOSFET. Not directly connected to an outside line.

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Presentation transcript:

COEN 180 Flash Memory

Floating Gate Fundamentals Floating Gate between control gate and channel in MOSFET. Not directly connected to an outside line.

Floating Gate Fundamentals

First used in Erasable Programmable Read Only Memory EPROM

Floating Gate Fundamentals To function, Floating Gate EPROM cell needs to be able to maintain a charge on the floating gate. Charge completely isolated, hence can be stored for long times. Floating: gate not connected to the outside.

Floating Gate Fundamentals No charge in floating gate. Assume control gate, source, drain at GND. Increase voltage in control gate: Floating gate voltage also increases, but at a lower rate. Raises the threshold value of the transistor. When threshold voltage is high enough, creates a channel between source and drain. Threshold value about twice as high.

Floating Gate Fundamentals Floating gate (negatively) charged: Isolates control gate from forming a channel at normal threshold values.

Floating Gate Fundamentals Discharging the floating gate: Exposure to UV light for twenty minutes. Chips have a crystal cover that allows UV light to hit the chip. UV light charges electrons on the floating gate so that they can break through the isolation layer around the floating gate.

Floating Gate Fundamentals To charge the floating gate Apply 12V (or higher) to control and drain Maintain source and substrate at ground For a few hundred microseconds. Creates a large drain current. Accelerates electrons to high velocity: hot electrons. Break through the silicon substrate SiO 2 barrier. Some get caught in the floating gate. Floating gate charge causes channel inversion. Electrons remain trapped on floating gate. Potential about -5V.

Floating Gate Fundamentals

Need to avoid trapping electrons in SiO 2 after several charge / discharge cycles. Could raise threshold value of transistor. Careful growth of SiO 2 layer.

Floating Gate Fundamentals