P. Bosshart, D. Daly, G. Gibb, M. Izzard, N. McKeown, J. Rexford, C. Schlesinger, D. Talayco, A. Vahdat, G. Varghese, D. Walker SIGCOMM CCR, 2014 Presented.

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Presentation transcript:

P. Bosshart, D. Daly, G. Gibb, M. Izzard, N. McKeown, J. Rexford, C. Schlesinger, D. Talayco, A. Vahdat, G. Varghese, D. Walker SIGCOMM CCR, 2014 Presented by Ye Tian for Course CS05112

Overview Motivation Abstract Forwarding Model A Programming Language An Example Review

Motivation Over the past five years, OpenFlow has grown increasingly more complicated The proliferation of new header fields shows no signs of stopping.

Motivation Rather than repeatedly extending the OpenFlow specification, we argue that future switches should support flexible mechanisms for parsing packets and matching header fields, allowing controller applications to leverage these capabilities through a common, open interface (i.e., a new “OpenFlow 2.0” API). Such a general, extensible approach would be simpler, more elegant, and more future-proof than today's OpenFlow 1.x standard.

Motivation P4: a higher-level language for Programming Protocol- independent Packet Processors Configure a switch, telling it how packets are to be processed Populate the forwarding tables in fixed function switches

Three goals Reconfigurable Redefine the packet parsing and processing in the field. Protocol independent the controller should be able to specify (i) a packet parser for extracting header fields with particular names and types and (ii) a collection of typed match+action tables that process these header Target independent Compiler should take the switch's capabilities into account when turning a target-independent description (written in P4) into a target-dependent program

Overview Motivation Abstract Forwarding Model A Programming Language An Example Review

Abstract Forwarding Model A programming parser Allow new headers to be defined Multiple stages of match+action In series, parallel, or combination of both Compare with OpenFlow Fixed parser Series of actions

Abstract Forwarding Model Two types of operations: Configure operations program the parser, set the order of match+action stages, and specify the header fields processed by each stage. Populate operations add (and remove) entries to the match+action tables that were specified during configuration.

Abstract Forwarding Model Arriving packets are first handled by the parser. Recognize and extract fields from the header The extracted header fields are then passed to the match+action tables. Ingress match+action table: determines the egress port(s) and determines the queue into which the packet is placed. The packet may be forwarded, replicated, dropped, or trigger flow control. Egress match+action table: performs per-instance modifications to the packet header

Abstract Forwarding Model Packets can carry additional information between stages, called metadata, which is treated identically to packet header fields. Example: ingress port, timestamp, …, etc Queueing: an action maps a packet to a queue

Overview Motivation Abstract Forwarding Model A Programming Language An Example Review

A Programming Language Dependencies between the fields Determine which table can be executed in parallel Table Dependency Graphs (TDG) TDG nodes map directly to match+action tables, and a dependency analysis identifies where each table may reside in the pipeline. an example table dependency graph for an L2/L3 switch.

A Programming Language Two-step compilation At the highest level, programmers express packet processing programs using an imperative language representing the control flow (P4); Below this, a compiler translates the P4 representation to TDGs to facilitate dependency analysis and then maps the TDG to a specific switch target.

Overview Motivation Abstract Forwarding Model A Programming Language An Example Review

An Example Consider an example L2 network deployment with top-of- rack (ToR) switches at the edge connected by a two-tier core. mTag: a combination of PortLand and MPLS. The routes through the core are encoded by a 32-bit tag composed of four single-byte fields. Each core switch need only examine one byte of the tag and switch on that information. The tag is added by the first ToR switch.

P4 Concepts A P4 program contains the following key components Headers: describes the sequence and structure of a series of fields. Parsers: specify how to identify headers and valid header sequences within packets. Tables: Match+action tables are the mechanism for performing packet processing. Actions: Construction of complex actions from simpler protocol-independent primitives. Control Programs: determine the order of match+action tables that are applied to a packet.

Header Formats An ordered list of names together with their width Ethernet and VLAN

Header Formats The mTag header can be added without altering existing declarations. Each core switch is programmed with rules to examine one of these bytes determined by its location in the hierarchy and the direction of travel. First and second levels up switch First and second levels down switch

The Packet Parser P4 assumes the underlying switch can implement a state machine that traverses packet headers from start to finish, extracting field values as it goes. P4 describes this state machine directly as the set of transitions from one header to the next.

The Packet Parser Starts in the start state and proceeds until an explicit stop state is reached or an unhandled case is encountered

Table Specification The edge switch matches on the L2 destination and VLAN ID, and selects an mTag to add to the header. The reads attribute declares which fields to match, qualified by the match type (exact, ternary, etc). The actions attribute lists the possible actions which may be applied to a packet by the table. The max size attribute specifies how many entries the table should support. The table specification allows a compiler to decide how much memory it needs, and the memory type (e.g., TCAM or SRAM) to implement the table. Note that this is NOY the run-time packet processing logic.

Table Specification

Brief denitions of other tables

Action Specification P4 defines a collection of primitive actions from which more complicated actions are built.

Action Specification If an action needs parameters (e.g., the up1 value for the mTag), it is supplied from the match table at runtime. P4's primitive actions include: set field: Set a specific field in a header to a value. copy field: Copy one field to another. add header: Set a specific header instance (and all its fields) as valid. remove header: Delete (“pop”) a header (and all its fields) from a packet. increment: Increment or decrement the value in a field. checksum: Calculate a checksum over some set of header fields (e.g., an IPv4 checksum).

The Control Program Specify the flow of control from one table to the next.

The Control Program The source check table verifies consistency between the received packet and the ingress port. It also strips mTags from the packet, recording whether the packet had an mTag in metadata. The local switching table is then executed. If this table “misses“, it indicates that the packet is not destined for a locally connected host. The mTag table is applied to the packet. Both local and core forwarding control can be processed by the egress check table which handles the case of an unknown destination by sending a notification up the SDN control stack.

The Control Program

Compiling packet parser The compiler translates the parser description into a parsing state machine

Compiling control program Control program: not explicitly call out dependencies between tables or opportunities for concurrency. Employ a compiler to analyze the control program to identify dependencies and look for opportunities to process header fields in parallel. Finally, the compiler generates the target configuration for the switch.

Compiling control program How mTag can compiled on different targets Software switch: The compiler directly maps the mTag table graph to switch tables. Hardware switches with RAM and TCAM: A compiler can configure hashing to perform efficient exact-matching using RAM, for the mTag table in edge switches. In contrast, the core mTag forwarding table that matches on a subset of tag bits would be mapped to TCAM. Switches supporting parallel tables: the tables mTag table and local switching can execute in parallel up to the execution of the action of setting an mTag.

Compiling control program Switches that apply actions at the end of the pipeline: In the mTag example, whether the mTag is added or removed could be represented in metadata. Switches with a few tables: Map a large number of P4 tables to a smaller number of physical tables. In the mTag example, the local switching could be combined with the mTag table.

P4 forum The newest specification Compiler & switch sourcecode …

Review What motivates P4, or OpenFlow 2.0. What is the key differences with OpenFlow 1.x. The components of the abstract forwarding model of a switch in P4. TDG The P4 language: The major components. How the language is compiled?