Prof R T Kennedy 1 EET 423 POWER ELECTRONICS -2

Prof R T Kennedy2 BUCK CONVERTER CIRCUIT CURRENTS I fwd I ds E i n I i n ILIL I ds ICIC I fwd C R L ILIL I out a b V out

Prof R T Kennedy3 BUCK CONVERTER CIRCUIT VOLTAGES E i n V out V ds a b V L,a-b C R L V fwd

Prof R T Kennedy4 SUB INTERVAL EQUIVALENT CIRCUITS V ds = 0 a b V L,a-b = E in -V out E i n C R V out L MOSFET ON RECTIFIER OFF V fwd = -E in r ds,on

Prof R T Kennedy5 SUB INTERVAL EQUIVALENT CIRCUITS E i n C R a b V out V fwd = 0 V ds = E in MOSFET OFF RECTIFIER ON L a b V L,a-b = -V out a b

Prof R T Kennedy6 E in =V ds +(- V fwd ) V L + V out = -V fwd E in VLVL V out V fwd V ds 0 V gs

Prof R T Kennedy7 E in = V ds + (-V fwd ) E in VLVL V out V fwd V ds 0 V gs - V fwd

Prof R T Kennedy8 SMPS OPERATION QUANTIZED POWER/ENERGY TRANSFER VOLTAGE REGULATION

Prof R T Kennedy9 VOLTAGE TRANSFER FUNCTION ANALYSIS ENERGY BALANCE ENERGY BALANCE POWER BALANCE POWER BALANCE VOLT-TIME INTEGRAL VOLT-TIME INTEGRAL

Prof R T Kennedy10 ‘IDEAL’ BUCK ANALYSIS CCM ENERGY BALANCE APPROACH INDUCTOR CURRENT I L,M I L,m I L,av = I out 0 t

Prof R T Kennedy11 SUB INTERVAL -1: MOSFET ON E i n C R L OFF a b ON ENERGY STORED INPUT ENERGY LOAD ENERGY from source

Prof R T Kennedy12 SUB INTERVAL -2: RECTIFIER ON E i n C R L ON a b OFF ENERGY Discharge NO INPUT ENERGY LOAD ENERGY from inductor

Prof R T Kennedy13 D sw E in V out

Prof R T Kennedy14 ‘IDEAL’ BUCK ANALYSIS CCM POWER BALANCE APPROACH INPUT CURRENT = MOSFET CURRENT I in,av = I ds,av I L,m I L,M I out 0 D sw T D fwd T I in t

Prof R T Kennedy15 FARADAY’S VOLT-TIME INTEGRAL INDUCTOR VOLTAGE V1V1 t1t1 0 INDUCTOR CURRENT t2t2 V2V2 0 t t I m I M T current start and finish at same value EQUAL AREAS

Prof R T Kennedy16 ‘IDEAL’ BUCK ANALYSIS CCM VOLT-TIME INTEGRAL APPROACH INDUCTOR VOLTAGE D sw T D fwd T 0 ILIL VLVL 0 E in -V out -V out t area B area A

Prof R T Kennedy17 ‘IDEAL’ BUCK ANALYSIS CCM VOLT-TIME INTEGRAL APPROACH INDUCTOR VOLTAGE

Prof R T Kennedy18 ‘ideal’ BUCK CONVERTER CCM voltage & current waveforms refer to msw notelet refer to msw notelet

Prof R T Kennedy19 V out 0 0 D sw TD fwd T D fwd = 1-D sw V gs I out IcIc ILIL I ds I fwd E in V ds V fwd VLVL V out E i n R I out IC IC L C I ds IL IL V ds I out I fwd V fwd V gs f sw VL VL

Prof R T Kennedy20 INDUCTOR CURRENT WAVEFORMS CCM or DCM operational mode CCM or DCM operational mode component current stress component current stress capacitor ripple current capacitor ripple current output voltage ripple output voltage ripple converter efficiency converter efficiency closed loop regulation performance closed loop regulation performance

Prof R T Kennedy21 INDUCTOR CURRENT v INDUCTANCE REDUCTION in L D sw TD fwd T 0 0 I out E in - V out -V out VLVL ILIL t

Prof R T Kennedy22 INDUCTOR CURRENT v INDUCTANCE REDUCTION in L D sw TD fwd T 0 0 I out E in -V out -V out VLVL ILIL t increased I sw,max I fwd,max I C,ripple V out,ripple

Prof R T Kennedy23 INDUCTOR CURRENT

Prof R T Kennedy24 INDUCTOR CURRENT 0 ILIL t I out D sw = 0.2 D sw = 0.5 D sw = 0.8 D sw > 0.5 D sw < 0.5 D sw = 0.5

Prof R T Kennedy25 INDUCTOR CURRENT 0 ILIL t UPSLOPE DOWNSLOPE

Prof R T Kennedy26 INDUCTOR PEAK-PEAK RIPPLE CURRENT

Prof R T Kennedy27 CCM-DCM BOUNDARY

Prof R T Kennedy28 CCM-DCM BOUNDARY boundary

Prof R T Kennedy29 CCM-DCM BOUNDARY boundary CCM DCM

Prof R T Kennedy30 CCM / DCM determined by R CCM-DCM BOUNDARY L D sw f sw constant to ensure a desired CCM does not transfer to DCM specify a minimum load current (maximum R) avoid open circuit operation CCM DCM INCREASE R ‘light loading’

Prof R T Kennedy31 CCM / DCM determined by L CCM-DCM BOUNDARY R D sw f sw constant to ensure a desired CCM does not transfer to DCM design for CMM at lowest inductance including  L v  I CCM DCM DECREASE L

Prof R T Kennedy32 CCM / DCM determined by f sw CCM-DCM BOUNDARY R D sw f sw constant to ensure a desired CCM does not transfer to DCM design for CMM at lowest frequency CCM DCM DECREASE f sw

Prof R T Kennedy33 CCM / DCM determined by D sw CCM-DCM BOUNDARY L R f sw constant to ensure a desired CCM does not transfer to DCM design for CMM at lowest duty cycle CCM DCM DECREASE D sw

Prof R T Kennedy34 LINE & LOAD REGULATION DCM CCM

Prof R T Kennedy35 LINE & LOAD REGULATION DCM CCM

Prof R T Kennedy36 ILIL ILIL ILIL t t t

Prof R T Kennedy37 ILIL ILIL ILIL t t t 

Prof R T Kennedy38 ILIL ILIL ILIL t t t 

Prof R T Kennedy39 OUTPUT EFFECTS E i n C L V out = 0 s/c I in t 0

Prof R T Kennedy40 OUTPUT EFFECTS E i n C L V out  E in o/c

Prof R T Kennedy41 POWER - UP EFFECT E i n C R V out V c = 0 L

Prof R T Kennedy42 POWER - DOWN EFFECT E i n C R V out L