1 of 16 April 25, 2006 System-Level Modeling and Synthesis Techniques for Flow-Based Microfluidic Large-Scale Integration Biochips Contact: Wajid Hassan Minhass Technical University of Denmark Wajid Hassan MinhassAdvisors: Paul Pop, Jan Madsen The proposed framework is targeted at facilitating programmability and automation. It is expected to enable designers to auto-generate chip architecture and to take early design decisions by being able to evaluate their own proposed architecture, minimizing the design cycle time. Biochips are replacing conventional biochemical analyzers and are able to integrate on-chip the necessary functionalities for biochemical analysis using microfluidics. In Flow-based biochips, liquid samples of discrete volume flow in the on-chip channel circuitry. The biochip has two layers (fabricated using soft lithography): flow layer and control layer. The liquid samples are in the flow layer and are manipulated through microvalves in control layer. By combining these microvalves, more complex units like mixers, micropumps etc. can be built with hundreds of units being accommodated on a single chip. This approach is called microfluidic Large- Scale Integration (mLSI). Microfluidic Biochips Microvalve Biochip: Functional View Architectural Synthesis: ( Allocation, Placement and Routing) Application Mapping: ( Binding, Scheduling and Fluid Routing) Starting from a given microfluidic component library and a desired application, our synthesis approach automatically synthesizes the biochip architecture aiming to minimize the application completion time. Currently, biochip designers are using full-custom and bottom-up methodologies involving multiple manual steps for designing chips and executing experiments. With chip design complexity on the rise (technology scaling at rapid speed) and multiple assays being run concurrently on a single chip (commercial chip with 25,000 valves and about a million features running 9,216 polymerase chain reactions in parallel), bottom- up manual methodologies are fast becoming inadequate and would not scale for larger, more complex designs. Objective: Devise a system-level modeling and synthesis framework for flow-based biochips capable of handling larger, more complex designs. List Scheduling-based binding and scheduling heuristic utilized (we have also proposed a constraint programming based approach for finding the optimal solution). Since routing latencies are comparable to operation execution times, thus fluid routing (contention aware edge scheduling) is also taken into account (boxes with labels Fx in figure below) along with the operation scheduling (boxes with labels Ox). As an output, we generate the control sequence for a biochip controller for auto executing the application on the specified biochip. Detector Mixer Filter In 3 In 4 In 2 In 1 Out 3 Out 2 Out 1 Source Sink Mix (4) Mix (5) Heat (3) Mix (4) Mix (3) Heat (2) Filter (5) Mix (2) O1 O2 O3 O5 O4 O6 O7 O8 O9 O10 Waste Input Motivation and Objective Contribution Application Model System Model Microfluidic Mixer Application Model: Directed sequencing graph. Architecture Model: We have proposed a topology graph-based approach. We propose a system-level top-down modeling and synthesis framework in order to synthesize the biochip architecture based on an application and to map the application onto the architecture while minimizing the application completion time and satisfying the constraints (e.g., resource, dependency). Architectural Synthesis In 1 In 2 In 3 In 4 Biochip: Schematic View z2z2 z3z3 z4z4 z5z5 z7z7 z8z8 z 11 Out 2 Out 3 Out 1 v1v1 v2v2 v3v3 v4v4 v6v6 v5v5 Detector Filter z 10 z 12 Mixer z9z9 z 13 z1z1 z6z6 v7v7 a Pressure source z 1 Control layer Flow layer Valve v a Fludic input Mixer 1 Mixer 2 Mixer 3 Heater 1 Filter 1 0 s 16 s 23.5 s42.5 s56 s O1 O3 O4 O2 O6 O7 O5 O8 O9 O10 F1 F4 F2F5 F14 F10F9 F3F6 F25-1 F19 F3F6 F15F14 F19 F23