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1 Placement-Aware Architectural Synthesis of Digital Microfluidic Biochips using ILP Elena Maftei Institute of Informatics and Mathematical Modelling Technical.

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Presentation on theme: "1 Placement-Aware Architectural Synthesis of Digital Microfluidic Biochips using ILP Elena Maftei Institute of Informatics and Mathematical Modelling Technical."— Presentation transcript:

1 1 Placement-Aware Architectural Synthesis of Digital Microfluidic Biochips using ILP Elena Maftei Institute of Informatics and Mathematical Modelling Technical University of Denmark

2 2 Microfluidic Biochips Lab on a chip Applications: Sampling and real-time testing of air/water samples for biochemical toxins Sulfate detection in atmospheric particles, for detecting adverse atmospheric conditions DNA analysis Clinical diagnosis DNA, RNA, proteins, living cells employed as sensing mediators on biochips Types: Continuous-flow microfluidics Digital microfluidic

3 3 Challenges Advantages: Cost (sample + unit cost) Space (miniaturization) Time (parallelism) Automation Challenges: System integration and design complexity Integration with microelectronic components in future SOC Radically different design and testing methods

4 4 Outline Motivation Technology Overview Architecture Working principle Design tasks Problem formulation ILP-based synthesis Local branching approach Experimental evaluation Conclusions

5 5 Architecture & Working principle Input Reservoir Microarray of cells Output Reservoir Photodiode Cell architecture Biochip architecture Electrowetting OperationsOperations: Dispensing Transport Mixing Splitting

6 6 Design Tasks SCHEDULING BINDING PLACEMENT ALLOCATION

7 7 Reconfigurability

8 8 Problem Formulation Input Sequencing graph Library of modules Application execution time Area constraint Output Implementation which minimizes application execution time

9 9 ILP-based synthesis Constraints: Scheduling and precedence Resource Placement Optimization objective: Minimize the completion time of the application

10 10 Constraints Scheduling and precedence constraints Each operation - scheduled only once An operation should be scheduled only after the completion of all its predecesors in the sequencing graph If not scheduled immediately then a storage unit must be considered Resource constraints Two operations bound to the same resource should not execute at the same time Placement constraints At each moment the area of the modules placed on the chip should not exceed the total area of the array Modules placed on the chip should not physically overlap

11 11 Local Branching Approach (LB) Hypothesis: considering placement during architectural synthesis leads to better results Approaches: Straight-forward approach (SF): architectural synthesis considered separately from placement Optimal synthesis approach (OS): consider placement during architectural synthesis Local branching approach (LB): Motivation: ILP not suitable for large applications Cause: time used to produce a provable optimal solution Need: good quality solutions in a reasonable time Solution: local branching Meta-heuristic that controls the behavior of the ILP solver

12 12 Experimental evaluation 1.In-vitro diagnosis on human physiological fluids Glucose and lactate measurements performed for each physiological fluid Used in diagnosis of metabolic disorders 2.Polymerase chain reaction (PCR) Mixing stage Mi x1 Mi x2 Mi x5 Mi x3 Mi x4 Mi x6 Mi x7 Technique used in molecular biology for DNA replication in a cell DNA polymerase used to amplify a piece of DNA Chain reaction: DNA generated is used as template for replication

13 13 Experimental evaluation GAMS 21.5, CPLEX 9.130 SunFire v440 4 UltraSPARC IIIi CPUs 1,062MHz and 8 GB RAM Results Observations: A 18.2% average improvement on the completion time considering placement at the same time with architectural-level synthesis Significant improvement for reduced biochip area 5.3% loss of quality vs. reasonable time for solving a large problem

14 14 Conclusions Addressed design problems characteristics to digital microfluidic biochips Proposed an ILP framework for the unified allocation, binding, scheduling and placement We have shown that considering placement during architectural synthesis leads to significantly better quality solutions


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