SYEN 3330 Digital SystemsJung H. Kim 1 SYEN 3330 Digital Systems Chapter 9 – Part 2.

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Presentation transcript:

SYEN 3330 Digital SystemsJung H. Kim 1 SYEN 3330 Digital Systems Chapter 9 – Part 2

SYEN 3330 Digital Systems Chapter 9-2 Page 2 Overview of Chapter 9 – Part 2 RAM Integrated Circuits  Dynamic RAM Array of RAM Integrated Circuits Arrays of Static and Dynamic RAMs

SYEN 3330 Digital Systems Chapter 9-2 Page 3 Dynamic RAM (DRAM) Basic Principle: Storage of information on capacitors. Charge and discharge of capacitor to change stored value Use of transistor as “switch” to:  Store charge  Charge or discharge See Figure 9-12 in text for circuit, hydraulic analogy, and logical model.

SYEN 3330 Digital Systems Chapter 9-2 Page 4 Dynamic RAM (DRAM) Block Diagram – See Figure 9-14 in text Refresh Controller and Refresh Counter Read and Write Operations –Application of row address –Application of column address –Why is the address split? –Why is the row address applied first? Timing – See Figure 9-15 in text

SYEN 3330 Digital Systems Chapter 9-2 Page 5 Making Larger Memories

SYEN 3330 Digital Systems Chapter 9-2 Page 6 Making Wider Memories