A configurable Interlock System for RF- Stations at XFEL M.Penno, T. Grevsmühl, H.Leich, A. Kretzschmann W.Köhler, B. Petrosyan, G.Trowitzsch, R.Wenndorff.

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Presentation transcript:

A configurable Interlock System for RF- Stations at XFEL M.Penno, T. Grevsmühl, H.Leich, A. Kretzschmann W.Köhler, B. Petrosyan, G.Trowitzsch, R.Wenndorff

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 2 XFEL  European X-ray free-electron laser project opens many possibilities for research with short wave length x-rays (below 1 nm) start of construction 2007 initial operation 2012 requires RF-Stations for the accelerator sections based on super- conducting cavities European XFEL-Project

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 3 Content Interlock Concept Interlock Hardware Software for the Interlock

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 4 Main Task of the RF-Interlock-System Prevent any damage from the cost expensive components of the RF-Station Prevent also any damage from other equipment Support secure operation of the RF-System

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 5 Sources of Interlock Error Signals Hardware failures (non-reversible malfunctions) –broken cable or damaged contact, dead sensor,... Soft errors (reversible error conditions) –sparks in the klystron or wave guide system –temperature outside a valid range,... Error conditions caused by transient noise from the RF-Station itself

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 6 Qualities of the XFEL Interlock System Configurable and scaleable System Modular structured Interlock functionality independend from software Support of different signal types –digital, LWL, analog inputs and outputs Selftest and reliability check on power up

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 7 Interlock3 architecture overview -interlock function completely implemented in hardware -Strict separation of interlock logic and processor bus

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 8 Interlock3 Module Architecture

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 9 Interlock3 Controller Architecture

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 10 Content Interlock Concept Interlock Hardware Software for the Interlock

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 11 Interlock Crate Distribution Panels - 19`` 3HU crate - 20 slots for slave modules Slave Modules Interlock Controller provides many signal connections distribution panels connect the interlock crate with incoming and outgoing signal cables  easy access to all signal cables  easy module exchange

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 12 Components of the Interlock System Controller Module –NIOS II Processor, 64MB RAM, 16MB Flash –Ethernet Interface Slave Modules –Digital I/O, 32 input, 8 output channels –Analog window comparator, 36 input channels –Light I/O, 6 input, 6 output channels, –Analog I/O, 8 input, output channels Backplane, power supply

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 13 Interlock Modules

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 14 NIOS/II Experiences easy scaleable by Altera SOPC-Builder good IDE integration and development flow close to hardware development no Memory Management Unit (MMU)  not suitable for our software project  software errors hard to find strange behavior with LWIP-Stack and µC/OS on our board fixing errors is very time consuming

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 15 Planned future development move on-board applications from NIOS/II to another platform shrink on-board applications on NIOS/II side put computer-on-board module on intlk.-controller (f.ex. x86-architecture, X-Board) use Linux as operating system AMD Geode SC1200 CPU 266 MHz Up to 128MB RAM / 128MB Flash on board Integrated video controller with up to 4MB DRAM Power consumption 3-4Watts On board 10/100MBit Ethernet IDE interface with UDMA-33 support PCI and LPC expansion busses 3 USB 1.1 ports OHCI 2 serial interfaces (TTL signals)

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 16 Interlock Controller Architecture with X-Board

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 17 Content Interlock Concept Interlock Hardware Software for the Interlock

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 18 Software capabilities Perform system-selftest at power-up Offer access over intranet via browser Access secured by authentication Display signal status and change signal mask Special mode for updating firmware and FPGA design

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 19 Klystron Interlock Server - Architecture

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 20 System-Test runs on power-up System-selftest checks: 1.controller 2.backplane 3.TM-bus, control-bus 4.modules 5.FPGA design compatibility 6.module configuration System-selftest must not fail, to put interlock system into operation mode

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 21 Interlock HTTP Interface -display actual signal states -edit signal-masks -edit interlock configuration

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 22 Klystron Interlock Server server runs on the controller, NIOS/II processor web-interface, access via browser

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 23 Access Privileges -User authentification -Different User Roles (chief engineer, engineer, technician) -IP-Address check, 2 addresses possible

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 24 Client Applications - Overview - DOOCS Interface for viewing state -Integration into the control-system - Tools under LabVIEW -Detailed error diagnostics

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 25 Interlock to DOOCS - Interface Interlock sends actual status data to Metaserver Metaserver integrates status- data into DOOCS-System and history Clients monitor signal states

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 26 Interlock to LabVIEW - Interface used for diagnostic view detailed information about interlock signals store highly detailed data into database for later diagnostic very helpful on resolving errors

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 27 Diagnostic with LabVIEW Diagnostic overview of all status signals Time graph of status signals

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 28 Viewing Timegraph Curves RF-Station working RF-Station paused

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 29 Example: Help with cable diagnose Noise impulses Select Curves working on cables noise removed

A configurable Interlock System for RF-Stations at XFEL 28. Nov., Tech. Seminar Marek Penno, DESY Page 30 Summary Highly flexible Interlock System for XFEL Interlock-function implemented in hardware Process many signals with different types Signals can be masked Updateable firmware over intranet High connectivity to other applications –DOOCS, LabVIEW, HTML-Browser

Thank you for your attention!