Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Characterization and Performance of Visible Light Photon Counters (VLPCs) for the Upgraded DØ Detector at the Fermilab Tevatron Don Lincoln Fermi National Accelerator Laboratory

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPCs for DØ  VLPC: Visible Light Photon Counter u Solid state photon detectors u Detects single photons u Operate at a few degrees Kelvin u Can work in a high rate environment u Quantum efficiency ~80% u High gain ~ electrons per converted photon u Low gain dispersion  The DØ detector uses VLPC readout for the following subsystems: u The scintillating fiber tracker: VLPC pixels u The central and forward preshower: VLPC pixels s scintillating strips of triangular cross-section Visible

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPC Operation  Based on the phenomenon of Impurity Band Conduction, occurring when a semiconductor is heavily doped with shallow donors or acceptors u Electrical transport occurs by charges hopping from impurity site to impurity site  In VLPC’s, the silicon is heavily doped with arsenic atoms u Impurity band 0.05 eV below the conduction band u Normal 1.12 eV valence band used to absorb photons u The 0.05 eV gap used to create an electron-D + avalanche multiplication s Small gap means low field needed

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 D + flow E field Undoped Silicon Doped Silicon Layer + - Intrinsic Region Gain Region Drift Region Photon eh Spacer and Substrate VLPC Operation Cross Section Electric Field Distribution

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPC Fabrication  The VLPCs fabricated on a silicon wafer, highly doped with antimony that serves as a common cathode  Series of layers are grown by vapor-phase epitaxy  Active VLPC structure u Silicon layer, heavily doped with arsenic donor atoms and lightly doped with acceptor boron atoms s The arsenic atoms form an impurity band s The boron atoms shape the electric field s When a bias voltage is applied, doped silicon layer divides –Gain Region: linear field region –Drift Region: constant field region u An undoped silicon layer tops the doped silicon layer 3” (7.6 cm)

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPC History  1987 published paper on SSPM Solid State Photo-Multipliers u sensitive into infra-red region  1989 HISTE Proposal Submitted High-Resolution Scintillating Fiber Tracker Experiment u Main goal: to suppress sensitivity in infrared region  HISTE I, HISTE II, HISTE III  1993 HISTE IV u Visible QE ~60%, Cosmic Ray Test at Fermilab  1994 HISTE V High QE High Gain  HISTE VI large scale production based on HISTE V

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 HISTE-VI VLPC chip  1 mm pixels  2x4 array (HISTE-VI)  To be assembled into 1024 pixel cassettes  Excellent individual photoelectron resolution  Actual performance dependent on many parameters

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 In DØ, VLPCs Housed in 1024 Channel Cassettes  1024 VLPC pixels in one cassette  Electronic readout: u custom SVXII chips 3’

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 The DØ Scintillating Fiber Tracker  8 nested cylinders  r = 20  51 cm  On each cylinder scintillating fibers u 2.5m or 1.7 m, long u 835 um diameter  Fibers arranged into u 1 axial doublet u 1 stereo (u or v) Constant pitch    Total channel count > 77K  Clear fiber, m long, brings signal to VLPCs

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPCs in the High Background Environment at DØ  In Run II of the Fermilab Tevatron luminosity will reach 2x10 32 cm -2 sec -1  The VLPCs that read out fibers closest to the beam will count photoelectrons at a rate of 10 MHz  The VLPCs attached to the outermost fibers will see a rate of about 2.5 MHz  The characterization of all chips was made at the background rate of 20 MHz

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Debiasing at High Rate  High rates: lower gain and QE  Degradation minimal if u Bias set higher than the bias at no background u Temperature of about 9K (7K typical for no background)

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Modeling of High Rates  Modeled by treating Drift Region as an internal resistor in series with an ideal VLPC u The additional current of D + carriers (impurity-band holes) generated by background photons increases voltage drop in the Drift Region at the expense of the field in the Gain Region (integral of the field = the bias voltage)  External bias must be increased to restore the field in the Gain Region D + flow E field Undoped Silicon Doped Silicon Layer Gain Region Drift Region

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPCs at High Rate  By increasing the bias voltage on the VLPCs we recover the quantum efficiency and gain, however, at the expense of a higher rate of dark counts

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Characterization Procedure  The test cryostat houses 14 VLPCs under test and one reference VLPC  Temperature is 9 K  Background LED pulses at 10 MHz, with 2 photoelectrons/pulse  Signal LED pulses at 500 Hz, with 2 photoelectrons/pulse 1060  s 2 ms  s

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Analysis Technique: Summary  Set background photoelectron rate (20 MHz)  Set signal rate ( Hz)  Find threshold (0.5% noise rate, 100 ns gate [0.35% in DØ])  Find gain (typically  (or 80 LeCroy 2249 ADC counts per photoelectron))  Find photoelectron yield  Determine quantum efficiency (typically 0 MHz)  Determine DØ single fiber trigger efficiency (assume 9 pe/mip)  Vary voltage to maximize triggering efficiency

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Analysis: Gain and Yield  Gain determined by separation between peaks  13 ADC counts per femtocoulomb  Typical Gain  Yield (pe.) N PE = (Average -Pedestal)/Gain  same voltage)

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Analysis: Threshold  VLPCs at operating temperature (9 K)  VLPCs at operating voltage ( V)  Pedestal run taken  Large 0-pe peak, much smaller 1-pe peak  Threshold set at 50kHz (Typically pe) 99.5% ADC Counts

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Analysis: Efficiency  N MIP,the number of photoelectrons expected from a minimum ionizing particle in the DØ fiber tracker: N MIP = N PE x9/2 u 9 photoelectrons observed in the prototype of the DØ tracker in a cosmic ray test u 2 is the number of photoelectrons in this setup, in the reference VLPC chip  Efficiency is the probability that the signal, which is assumed to have Poisson distribution with mean, N MIP, is greater than the threshold

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Acceptance Criteria  Data taken at several values of the bias voltage in steps of 0.2 V  Operating bias: average of pixels’ efficiency is a maximum (not Quantum Efficiency)  Chip accepted if at the operating voltage u The efficiency of each pixel greater than 0.99 u The gains of all pixels similar

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 VLPCs for DØ  VLPC’s manufactured in two distinct cycles u First 1/3 (higher gain) u Then 2/3 (lower gain)  needed including 10% spares  tested at 20 MHz  accepted u Yield: 87% u Attempted recovery of failed chips underway.  0 MHz results u 382 chips

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Efficiency, Bias Voltage  Efficiency much higher than the required minimum 0.99 Operating Bias Voltage ranges from 5.8 V to 8.0 V   V  V

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November Gain (in Thousands) Frequency Gain Gains (in thousands) Range from to Gain dispersion of the pixels within one chip About 1.5 %  

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Threshold Thresholds for 50 kHz dark count rate Range from 1.2 to 1.8 pe RMS of threshold dispersion of the pixels within one chip About 0.03 pe

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Threshold Thresholds in fC Range from 5 fC to 15 fC

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Quantum Efficiency and Threshold  Algorithm selects voltage where noise begins to grow, not at maximum Quantum Efficiency

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Qualitative Threshold  Noise grows very quickly, once a voltage threshold is exceeded.

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Gain Behavior  Gain poorly correlated with voltage, but relative gain extremely correlated.

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Temperature Behavior  Temperature affects response.  All plots normalized to signal at 9 K (nominal operating temperature).

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Linearity at 0 MHz Background  VLPC’s are linear to <10% for Equivalent PE ~600 (~750 photons)  Slight gain dependence, although gain is only tangentially related. Response of High Gain VLPC E+001.E+011.E+021.E+031.E+041.E+05 Equivalent Photoelectrons = QE(for one pe) * photons Integrated Charge (Arbitrary Units) measured linear reference Gain ~ Gain ~ Normalization Point Measurement Artifact

Don Lincoln, Fermi National Accelerator Laboratory, Instr’99, November 1999 Summary  Test yield 87%, higher than anticipated  Chips need to be sorted because of the spread in the bias voltage and threshold u One bias per 8 VLPC chips in DØ detector u One threshold per 8 VLPC chips in the DØ trigger electronics  All pixels belonging to one chip have nearly identical efficiencies, gains, and thresholds  Operating phase space complex u Temperature, Voltage, Rate, Gain, Threshold, Efficiency  We will make calibration runs to adjust operating voltage and thresholds to the actual background seen in the experiment