Theme 2 DC Network Analysis and Network Theorems.

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Presentation transcript:

Theme 2 DC Network Analysis and Network Theorems

Independent Sources Ideal Voltage Source- Voltage at Terminals independent of Load Ideal Voltage Source

Non-Ideal Voltage Source – – An Ideal voltage source is only theoretical and does not exist in reality – A practical voltage source can be modelled with a small resistance in series with an Ideal voltage source +-+- RsRs RLRL +-+- VoVo E

Ideal Current Source – Current supplied is independent of Load Ideal Current Source

Non-Ideal Current Source- Can be modeled with a large resistor in Parallel RsRs RLRL ILIL I

Network Theorems Kirchoff’s Current Law- The algebraic sum of currents leaving a NODE is zero, at any given instant

i1i1 i3i3 i2i2 i4i4 Convention Used: Currents Entering a Node are POSITIVE, and Currents Leaving a Node are NEGATIVE.

Kirchoff’s Voltage Law- The algebraic sum of voltage drops around a closed path is zero.

+-+- R1R1 R2R2 R3R3 R4R4 + - V1V1 V2V2 V3V3 V4V4 E I Convention Used: Voltage drop Given a NEGATIVE Sign

Class Example: – Find Value of I 1, I 2, I 3, I 4 and Direction of I 2, and value of R 2 R 1 =5Ω V 3 =18V I3I3 R 2 =? R 3 =3Ω R 4 =4Ω + - V 2 =24V + - V 4 =20V + - V 1 =15V I 1 =? 2I 4 I 2 =?

Class Example: Find the Voltage drops across each Resistor R + - V1V1 E V2V2 V3V3 2R 3R I

LOOP CURRENT NETWORK ANALYSIS – Formulate circuit equations using a set of current variables. – The Variables(Unknown Currents) Satisfy KCL. – Thus circuit can be described using independent KVL equations. METHOD Take the shortest KVL loop (Current loops in Clockwise direction) and write KVL equation. Where more than one loop Flows in an Element, the algebraic sum of the currents is used-thus voltage across that element can be found.

+-+- R1R1 R3R3 R2R2 EAEA I1I ECEC EBEB I2I2 Class Example: Write down the KVL Equations using unknown Variables I 1 and I 2.

Class Example: Find I 1 and I R 1 =15Ω R 3 =12Ω R 2 =20Ω E A =12V I1I E C= 10V I2I2 E B =16V

NODAL VOLTAGE NETWORK ANALYSIS – Formulation of circuit equations where the variables (Unknown Voltage Nodes) satisfy KVL. – KCL Equations are used to find selected voltage node values, thus currents through a given element can be found. METHOD – Identify independent Nodes, and select one node as the reference. – Write the KCL Equations and solve

+-+- R1R1 R3R3 R2R2 EAEA +-+- I1I1 I3I3 I2I2 EBEB Node M with a Voltage V M Node O

Class Example: Find I 1, I 2, I 3 and V M Ω=R 1 6Ω=R36Ω=R3 5Ω=R25Ω=R2 12V E A +-+- I1I1 I3I3 I2I2 8V E B O M VMVM