Foundry Characteristics

Foundry Characteristics AMS H35 Minimal gate length 350nm Number of metals: 4 Supply voltage 3.3V Floating gate structure – isolated NMOS and PMOS within HV deep-n-well Standard substrate resistivity 20 Ω cm Higher resistivity on request possible Wafer size 8 inch Maximal reticle size: 22cm x 26 cm Maximal chip size: chip + test structures fit into a circle of 3.11cm diameter (1.9cm x 2.45cm possible) TSV possible: pitch 260 µm ER cost: mask set: 74.790 Euro (quote 2011) ER cost: Engineering run 8 inch Wafers (6 started, 2 guaranteed):  19.800 Euro

Foundry Characteristics AMS H18 (actually produced by IBM as CMHV7SF) Minimal gate length 180nm Number of metals: 6 Supply voltage 1.8V Floating gate structure – isolated NMOS and PMOS within HV deep-n-well Standard substrate resistivity ~10 Ω cm Wafer size: 8 inch Maximal chip size: 18,73 x 20,77 – but diagonal size matters (so far biggest 20,76 x 18,73 with distance between reticles x = 100 um und y = 700 um for test structures) Run price: 32 Masks x 4.500 €/Mask = 144.000 € Engineering run (with 6 Wafers started and 2 Wafers guaranteed): 31.350 €

AMS H35

Teststrukturen=scribe line Reticle in H35 … 22mm Teststrukturen=scribe line Multiple of 80µ Chip d Max. ∅ = 31112 µm 26mm scribe Line (80µ)

TSV – bask side RDL Face2Face Bumping of two Wafers (cross section) 0.13µ Readout Chip (Wafer 1) Thickness ~100µm Bump M4 Read out Chip CMOS Side M3 M1 H35-CMOS sensor (Wafer 2) Thickness ~215µm Transistor nwell Sensor Backside RDL VIAT_TSV Wire bond pad (PAD_TSV) RDL (MET4_TSV) Wire bond

Face2Back wafer bonding TSV – 3D detector Face2Back wafer bonding Cross section VIATTSV M4=MTTSV M3 M1 Transistor Tier2 (Readout part) Bond Oxide M4 (METB) M3 M2 M1 Transistor Tier1 (Sensor part)

Pixel detectors … Capacitive signal transmission Wire bonds for sensor chip Wire bond for sensor bias CMOS pixel sensor several reticles (e.g. 4 x 2 cm) CMOS pixel sensor several reticles (e.g. 4 x 2 cm) Pixel sensor (diode based) (e.g. 8 x 2cm) Wire bonds for RO chips Wire bonds for RO chips Wire bonds for RO chips Readout chip Readout chip TSVs Wire bonds for sensor chip Readout chip PCB CMOS pixel sensor with backside contacts CMOS pixel sensor Pixel sensor Backside contact Readout chips Readout chips PCB PCB PCB Detector as it is done now: Diode based pixel sensor bump-bonded to readout ASICs Present development: CMOS pixel sensor capacitively coupled to readout ASICs With TSVs CMOS pixel sensor with backside contacts capacitively coupled to readout ASICs

Pixel detectors with TSVs Capacitive signal transmission Bumps or capacitive signal transmission … CMOS pixel sensor several reticles (e.g. 4 x 2 cm) Contacts for the readout chip are fed through the sensor substrate Readout chip TSVs Pixel sensor Pixel sensor Readout chips Sensor reticle 1x2cm Readout chip 2x2cm Type B: sensor- and readout chip contacts on the back side Sensor reticle 1x2cm Sensor reticle 2x2cm Reticle-reticle Connection (power) TSVs for sensor- and readout chip contacts TSV Type A: sensor contacts on the back side

Strip detectors Pixels on the bottom tier (signals are multiplexed to readout lines) .. Large strip sensor (10x10cm) Readout ASIC Smaller number of wire bonds for IOs and power Readout electronics placed on top tier Readout electronics placed on chip periphery CMOS sensor 2x2cm 100’s of wire bonds with pitch 80um Flex PCB Flex PCB Flex PCB TSVs (one per readout line) with a pitch of 80um connect pixels and readout electronics Smaller number of wire bonds for IOs and power Detector as it is done now: Diode based strip sensor wire bonded to readout ASICs Present development: CMOS detector With TSVs: Advanced 3D detector with TSVs