It is the work space for the CPU Temporary storage for data/programs the CPU is working with. Started as a collection of IC’s on Motherboard. Two main.

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Presentation transcript:

It is the work space for the CPU Temporary storage for data/programs the CPU is working with. Started as a collection of IC’s on Motherboard. Two main types: volatile and non-volatile. Usually rated in access time - ms or ns

FIRMWARE Set of memory chips contained on the Motherboard. Contains a small program with startup instructions. Program is motherboard specific based on it’s hardware. Contained in some type of ROM, sometimes called BIOS.

ROM Read Only Memory Data can be accessed but not changed. Non-volatile ( retains information indefinitely )

PROM Programmable Read Only Memory It can be programmed once only but doesn’t have to happen during manufacture as with ROM. Can be taken off shelf and programmed for specific motherboard.

EPROM Erasable Programmable Read Only Memory Reusable memory chip It’s electrically programmed It’s erased by exposing a window on top with ultraviolet light Special equipment needed

EEPROM Electrically Erasable Programmable Read Only Memory Uses high voltage electricity to erase special equipment needed

Flash ROM Sometimes called Flash Memory Erased by super voltage charge limited in number of times it can be rewritten

RAM Random Access Memory Volatile - loses data if power is removed. Needs a controller between CPU and memory to manage data transfers. Has many variations.

DRAM Dynamic RAM Dynamic means - data can be written into memory over and over again Series of transistors and capacitors Capacitors lose charge so it must be refreshed Refreshed every 15 milliseconds

SRAM Static RAM Uses 6 transistors for every bit but no capacitors Doesn't need refreshed Costly but very fast Used for cache, small memory cards and CMOS

FPM DRAM Fast Page Mode DRAM Sometimes called paging or page mode It’s a variation on static column or nibble modes Keeps row address the same for faster access Uses wide channel Uses interleaving, meaning two banks are needed

EDO RAM Extended Data Output RAM Produced by Micron Technologies for multiple reads Uses a wide channel, can read one column while writing in another discharges bit only after new bit is written Modified and faster than FPM while costing the same Ideal for bus systems up to 66Mhz

Burst EDO DRAM Called BEDO Enhancement of EDO DRAM Was overshadowed by SRAM Very little chip set support No longer in production

SDRAM Synchronous DRAM Uses a clock that is synced with system clock for data transfers Used mainly in graphics cards Uses wide memory channel Started in 97 Found in DIMM form Rated in MHZ

RDRAM Rambus Dynamic RAM Released in late 99 by Rambus, Inc. Access speeds up to 800Mhz It is a chip to chip memory bus 1st used and popularized in Nintendo 64systems 32 Rambus devices can be connected to one Rambus memory channel Chips are contained in a 184pin RIMM package

RDRAM Modules are serially connected back to the Motherboard, continuity module needed for unused sockets. 3 X faster than SDRAM, about 700Mhz Transfers on both rise and fall of clock signal Low power consumption - ideal for laptops. Rambus only leases, it doesn’t manufacture at all.

DDR SDRAM Came out in late 99 Double Data Rate Synchronous RAM Transfers on rise and fall of clock signal Packaged in DIMM format PC100, PC133

VRAM Video RAM 2 paths for memory access, one write & one read Larger, more expensive but faster than DRAM

WRAM Windows RAM Developed by Samsung Electronics for display adapters Faster than VRAM Uses dual porting that simultaneously refreshes Developed as a graphics accelerator for windows 3.x

Memory Problems Most problems are due to one corrupt bit. ESD sensitive Must be supported by chip set

Non Parity Sometimes called Fake Parity Nothing extra added to memory bank Low cost No fault tolerance at all Used in low cost systems from 95 till recently Manufacturers starting to stay clear of it now

Parity Adds one bit to every byte of data making 9 bits 9th bit referred to as parity bit Computer counts number of 1’s in byte and determines if it’s a odd or even number parity bit is either a 1 or 0 for odd/even At anytime bits can be added together to check integrity.

Parity Tells you there’s a problem Pros Guards against faulty calculations based on data checks Pinpoints the source of errors Cons Can’t fix data corruption's

ECC Error Correction Code Adds ECC bits to each bit of data Can correct single bit errors and you keep on working Used on higher end systems due to higher cost

Memory Packages Original PC's used 36 individual IC’s in sockets Due to thermal change, creep was a big problem Memory was then soldered, which made it difficult to replace expansion cards with lock mechanisms were then developed

SIMM Single Inline Memory Module Single row of terminal on one side of module 30 or 72 pin variations 30 pin was 8 bit with one parity bit 72 pin was 32 bit with 4 parity

DIMM Dual Inline Memory Module Terminals on both sides 1 inch longer than 72 pin SIMM’s 168 pins 64 bit non parity or 72 bit parity or ECC

SIPP Single Inline Pinned Package Basically a SIMM with pins soldered to it Rarely used today Pins easily bent

RIMM Rambus Inline Memory Module Only used for RDRAM 184 pins Similar to a DIMM Package

Generic Information Chip set must support the type and amount of memory you’re installing Gold pin sockets must use gold pin modules Memory rated in nanoseconds or MHZ Adding memory is the cheapest way to increase system performance