Digital Logic Structures: Chapter 3 COMP 2610 Dr. James Money COMP

Gated D Latch Two inputs: D (data) and WE (write enable) – when WE = 1, latch is set to value of D S = NOT(D), R = D – when WE = 0, latch holds previous value S = R = 1

Register As we have seen before, it is usually convenient to work in quantities of more than one bit at a time Many times, we use 16 bits such as on the LC-3 computer We want to store and read these as self contained units

Register Let us consider an example, for simplicity, of a 4 bit register The four bit value stored in the register is Q 3, Q 2, Q 1, Q 0 The value D 3, D 2, D 1, and D 0 can be written if WE is asserted

Register

A common shorthand notation is to describe a sequence of bits that are numbered as above as Q[3:0] Each bit is assigned it’s own number The rightmost bit is bit [0] and the leftmost is bit [n-1] for n bits

Register Consider the 16 bit pattern Bit [15] is 0, bit [14] is 0, bit [13] is 1, and so on Bit [0] is 0, bit [1] is 1, and bit [2] is 1

Register We can also designate a subunit of the pattern by Q[l:r], where l is the leftmost bit and r is the rightmost bit We call such a unit a field

Register If A[15:0] is our example before of Then, – A[15:12] is 0011 – A[13:7] is – A[2:0] is 110 – A[1:1] is 1

Register Note that the numbering scheme from right to left is arbitrary We could of course number left to right In many cases, we use right to left in practice

Concept of Memory We now have all the tools to describe memory on a computer Memory is made up of a large number of locations, each uniquely identifiable Each location can store a value

Concept of Memory The unique identifier of each memory location is called an address We refer to the number of bits stored at each address as its addressability You might have 16MB of memory This means there is 16 million addresses(in base 2 at least) and each address is 8 bits

Address Space We refer to the total number of address as the memory’s address space With n bits for an address, we can have up to 2 n locations 16MB = 16 * (1024)*1024 = 2 24 bytes

Addressability The addressability is the number of bits stored at each address In our example before, the addressability was 8 bits or 1 byte Most computers are byte addressable for historic reasons

A 2 2 -by-3-bit Memory In the example, the memory has an address space of 4 locations and addressability of 3 bits Accessing memory requires decoding the address bits The address decoder takes A[1:0] and asserts one line

A 2 2 -by-3-bit Memory We say the word line is being addresses in this example Each row is a word line Memory can be read by using the correct value for A[1:0]