© David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 1 ECE408 / CS483 Applied Parallel Programming Lecture 26: Joint CUDA-MPI Programming

Objective To become proficient in writing simple joint MPI-CUDA heterogeneous applications –Understand the key sections of the application –Simplified code and efficient data movement using GMAC –One-way communication To become familiar with a more sophisticated MPI application that requires two-way data- exchange © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 2

Blue Waters Computing System Sonexion: 26 PBs >1 TB/sec 100 GB/sec 10/40/100 Gb Ethernet Switch 10/40/100 Gb Ethernet Switch Spectra Logic: 300 PBs 120+ Gb/sec WAN IB Switch © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 3

Cray XE6 Nodes Dual-socket Node –Two AMD Interlagos chips 16 core modules, 64 threads 313 GFs peak performance 64 GBs memory –102 GB/sec memory bandwidth –Gemini Interconnect Router chip & network interface Injection Bandwidth (peak) –9.6 GB/sec per direction HT3 Blue Waters contains 22,640 Cray XE6 compute nodes. © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 4

Cray XK7 Nodes Dual-socket Node –One AMD Interlagos chip 8 core modules, 32 threads GFs peak performance 32 GBs memory –51 GB/s bandwidth –One NVIDIA Kepler chip 1.3 TFs peak performance 6 GBs GDDR5 memory –250 GB/sec bandwidth –Gemini Interconnect Same as XE6 nodes PCIe Gen2 HT3 Blue Waters contains 3,072 Cray XK7 compute nodes. © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 5

Gemini Interconnect Network Blue Waters 3D Torus Size 23 x 24 x 24 InfiniBand SMW GigE Login Servers Network(s) Boot Raid Fibre Channel Infiniband Compute Nodes Cray XE6 Compute Cray XK7 Accelerator Service Nodes Operating System Boot System Database Login Gateways Network Login/Network Lustre File System LNET Routers Y X Z Interconnect Network Lustre © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 6

Blue Waters and Titan Computing Systems NCSAORNL System AttributeBlue WatersTitan VendorsCray/AMD/NVIDIACray/AMD/NVIDIA ProcessorsInterlagos/KeplerInterlagos/Kepler Total Peak Performance (PF) Total Peak Performance (CPU/GPU)7.1/42.6/24.5 Number of CPU Chips 48,35218,688 Number of GPU Chips3,07218,688 Amount of CPU Memory (TB) Interconnect3D Torus3D Torus Amount of On-line Disk Storage (PB) Sustained Disk Transfer (TB/sec)> Amount of Archival Storage Sustained Tape Transfer (GB/sec)1007 © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 7

Science AreaNumber of Teams CodesStruct Grids Unstruct Grids Dense Matri x Sparse Matrix N- Body Mont e Carlo FF T PICSignific ant I/O Climate and Weather3CESM, GCRM, CM1/WRF, HOMME XXXXX Plasmas/Magnetosphere2H3D(M),VPIC, OSIRIS, Magtail/UPIC XXXX Stellar Atmospheres and Supernovae5PPM, MAESTRO, CASTRO, SEDONA, ChaNGa, MS- FLUKSS XXXXXX Cosmology2Enzo, pGADGET XXX Combustion/Turbulence2PSDNS, DISTUF XX General Relativity2Cactus, Harm3D, LazEV XX Molecular Dynamics4AMBER, Gromacs, NAMD, LAMMPS XXX Quantum Chemistry2SIAL, GAMESS, NWChem XXXXX Material Science3NEMOS, OMEN, GW, QMCPACK XXXX Earthquakes/Seismology2AWP-ODC, HERCULES, PLSQR, SPECFEM3D XXXX Quantum Chromo Dynamics1Chroma, MILC, USQCD XXX Social Networks1EPISIMDEMICS Evolution1Eve Engineering/System of Systems1GRIPS,Revisit X Computer Science1 XXXXX © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 8

CUDA-based cluster Each node contains N GPUs … … GPU 0 GPU N PCIe CPU 0 CPU M Host Memory … … GPU 0 GPU N PCIe CPU 0 CPU M Host Memory 9 © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

MPI Model Many processes distributed in a cluster Each process computes part of the output Processes communicate with each other Processes can synchronize © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 10 Node

MPI Initialization, Info and Sync int MPI_Init(int *argc, char ***argv) –Initialize MPI MPI_COMM_WORLD –MPI group with all allocated nodes int MPI_Comm_rank (MPI_Comm comm, int *rank) –Rank of the calling process in group of comm int MPI_Comm_size (MPI_Comm comm, int *size) –Number of processes in the group of comm 11 © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

Vector Addition: Main Process 12 int main(int argc, char *argv[]) { int vector_size = 1024 * 1024 * 1024; int pid=-1, np=-1; MPI_Init(&argc, &argv); MPI_Comm_rank(MPI_COMM_WORLD, &pid); MPI_Comm_size(MPI_COMM_WORLD, &np); if(np < 3) { if(0 == pid) printf(“Nedded 3 or more processes.\n"); MPI_Abort( MPI_COMM_WORLD, 1 ); return 1; } if(pid < np - 1) compute_node(vector_size / (np - 1)); else data_server(vector_size); MPI_Finalize(); return 0; } © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

MPI Sending Data int MPI_Send(void *buf, int count, MPI_Datatype datatype, int dest, int tag, MPI_Comm comm) –buf : Initial address of send buffer (choice) –count : Number of elements in send buffer (nonnegative integer) –datatype : Datatype of each send buffer element (handle) –dest : Rank of destination (integer) –tag : Message tag (integer) –comm : Communicator (handle) 13 © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

MPI Sending Data int MPI_Send(void *buf, int count, MPI_Datatype datatype, int dest, int tag, MPI_Comm comm) –Buf: Initial address of send buffer (choice) –Count: Number of elements in send buffer (nonnegative integer) –Datatype: Datatype of each send buffer element (handle) –Dest: Rank of destination (integer) –Tag: Message tag (integer) –Comm: Communicator (handle) 14 Node © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

MPI Receiving Data int MPI_Recv(void *buf, int count, MPI_Datatype datatype, int source, int tag, MPI_Comm comm, MPI_Status *status) –Buf: Initial address of receive buffer (choice) –Count: Maximum number of elements in receive buffer (integer) –Datatype:Datatype of each receive buffer element (handle) –Source: Rank of source (integer) –Tag: Message tag (integer) –Comm: Communicator (handle) –Status: Status object (Status) 15 © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

MPI Receiving Data int MPI_Recv(void *buf, int count, MPI_Datatype datatype, int source, int tag, MPI_Comm comm, MPI_Status *status) –Buf: Initial address of receive buffer (choice) –Count: Maximum number of elements in receive buffer (integer) –Datatype:Datatype of each receive buffer element (handle) –Source: Rank of source (integer) –Tag: Message tag (integer) –Comm: Communicator (handle) –Status: Status object (Status) 16 Node © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

Vector Addition: Server Process (I) 17 void data_server(unsigned int vector_size) { int np, num_nodes = np – 1, first_node = 0, last_node = np - 2; unsigned int num_bytes = vector_size * sizeof(float); float *input_a = 0, *input_b = 0, *output = 0; /* Set MPI Communication Size */ MPI_Comm_size(MPI_COMM_WORLD, &np); /* Allocate input data */ input_a = (float *)malloc(num_bytes); input_b = (float *)malloc(num_bytes); output = (float *)malloc(num_bytes); if(input_a == NULL || input_b == NULL || output == NULL) { printf(“Server couldn't allocate memory\n"); MPI_Abort( MPI_COMM_WORLD, 1 ); } /* Initialize input data */ random_data(input_a, vector_size, 1, 10); random_data(input_b, vector_size, 1, 10); © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

Vector Addition: Server Process (II) 18 /* Send data to compute nodes */ float *ptr_a = input_a; float *ptr_b = input_b; for(int process = 1; process < last_node; process++) { MPI_Send(ptr_a, vector_size / num_nodes, MPI_FLOAT, process, DATA_DISTRIBUTE, MPI_COMM_WORLD); ptr_a += vector_size / num_nodes; MPI_Send(ptr_b, vector_size / num_nodes, MPI_FLOAT, process, DATA_DISTRIBUTE, MPI_COMM_WORLD); ptr_b += vector_size / num_nodes; } /* Wait for nodes to compute */ MPI_Barrier(MPI_COMM_WORLD); © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

Vector Addition: Server Process (III) 19 /* Wait for previous communications */ MPI_Barrier(MPI_COMM_WORLD); /* Collect output data */ MPI_Status status; for(int process = 0; process < num_nodes; process++) { MPI_Recv(output + process * num_points / num_nodes, num_points / num_comp_nodes, MPI_REAL, process, DATA_COLLECT, MPI_COMM_WORLD, &status ); } /* Store output data */ store_output(output, dimx, dimy, dimz); /* Release resources */ free(input); free(output); } © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

Vector Addition: Compute Process (I) 20 void compute_node(unsigned int vector_size ) { int np; unsigned int num_bytes = vector_size * sizeof(float); float *input_a, *input_b, *output; MPI_Status status; MPI_Comm_size(MPI_COMM_WORLD, &np); int server_process = np - 1; /* Alloc host memory */ input_a = (float *)malloc(num_bytes); input_b = (float *)malloc(num_bytes); output = (float *)malloc(num_bytes); /* Get the input data from server process */ MPI_Recv(input_a, vector_size, MPI_FLOAT, server_process, DATA_DISTRIBUTE, MPI_COMM_WORLD, &status); MPI_Recv(input_b, vector_size, MPI_FLOAT, server_process, DATA_DISTRIBUTE, MPI_COMM_WORLD, &status); © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

Vector Addition: Compute Process (II) 21 /* Compute the partial vector addition */ for(int i = 0; i < vector_size; ++i) { output[i] = input_a[i] + input_b[i]; } /* Send the output */ MPI_Send(output, vector_size, MPI_FLOAT, server_process, DATA_COLLECT, MPI_COMM_WORLD); /* Release memory */ free(input_a); free(input_b); free(output); } © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign

QUESTIONS? © David Kirk/NVIDIA and Wen-mei W. Hwu, ECE408/CS483, University of Illinois, Urbana-Champaign 22