Computers Internal Communication
Basic Computer System MAIN MEMORY ALUCNTL..... BUS CONTROLLER Processor I/O moduleInterconnections BUS Memory
Local and Peripheral Bus
Bus Operation Transfer Quantity (word) Address bus Control bus Data bus Speed Clock speed
Controller PROCESSOR REGISTER BUFFER
Controller Operation PROCESSOR REGISTER BUFFER VALUE PROCESSOR BUFFERHEADERCRC PROCESSOR BUFFER CRC CPU passes parameters into the registers Controller transfers data into the card bufferCard processor checks the CRCData is transferred from the buffer to the bus
I/O Operations For the I/O device to communicate with the CPU, the designer includes additional registers in the CPU. I/O Address Register contains address of I/O device I/O Buffer Register contains the value to be transferred to/from the I/O device
I/O Registers IR 300PC CONTROL ARITHMETIC-LOGIC ACCUM PROGRAM DATA I/O Address I/O Buffer
I/O Processing Programmed I/O Control Test Read/Write Interrupt Driven I/O Direct Memory Access
1. Programmed I/O Issue an I/O request CPU is tied up checking the I/O device until the response is ready. Solution: Interrupt Processing Wait until I/O finished Continue program
2. Interrupt Processing Issue an I/O request Store program parameters Start another process Process interrupt Return to original process
3. DMA Processor issues a request, then Goes about its business DMA module transfers the data, then Tells the processor
Programmed I/O Issue an I/O request CPU is tied up checking the I/O device until the response is ready. Solution: Interrupt Processing Wait until I/O finished Continue program
Interrupt Processing
Start FETCHEXECUTE Halt CHECK INTERRUPT
Interrupt Processing Issue an I/O request Store program parameters Start another process Process interrupt Return to original process
Classes of Interrupts Program: illegal program operations Timer: scheduled special operations I/O: device controller signals completion of operations or error Hardware Failure: power failure, memory parity error, etc.
Interrupt Request (IRQ) Registers IR 300PC CONTROL ARITHMETIC- LOGIC ACCUM PROGRAM DATA I/O Address I/O Buffer IRQ Stack Addr.
Basic CPU Operation Start FETCH EXECUTE Halt INTERRUPT PROCESS
Interrupt Stack Add a CPU register: stack pointer. Recognize interrupt Store register contents (push stack) Process interrupt Restore register contents (pop stack) STACK PROGRAM COUNTER INSTRUCTION REGISTER ACCUMULATOR Etc. Base Address May also contain interim program values
Data Transfer: Interrupt Driven I/O MAIN MEMORY BUFFER CPU TAAD CONTROLLER DASD CPU
Data Transfer: Direct Memory Access MAIN MEMORY BUFFER CPU TAAD DASD CONTROLLER