Faculty of Engineering, Electrical Department,

Slides:



Advertisements
Similar presentations
Registers of the 8086/ /2002 JNM.
Advertisements

There are two types of addressing schemes:
Introduction to 8086 Microprocessor
CEN 226: Computer Organization & Assembly Language :CSC 225 (Lec#3) By Dr. Syed Noman.
© 2006 Pearson Education, Upper Saddle River, NJ All Rights Reserved.Brey: The Intel Microprocessors, 7e Chapter 2 The Microprocessor and its Architecture.
TK 2633 Microprocessor & Interfacing Lecture 3: Introduction to 8085 Assembly Language Programming (2) 1 Prepared By: Associate Prof. Dr Masri Ayob.
1 ICS 51 Introductory Computer Organization Fall 2006 updated: Oct. 2, 2006.
Room: E-3-31 Phone: Dr Masri Ayob TK 2633 Microprocessor & Interfacing Lecture 1: Introduction to 8085 Assembly Language.
ICS312 Set 3 Pentium Registers. Intel 8086 Family of Microprocessors All of the Intel chips from the 8086 to the latest pentium, have similar architectures.
8051 ASSEMBLY LANGUAGE PROGRAMMING
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2014 Lecture 4: x86 memory.
Unit-1 PREPARED BY: PROF. HARISH I RATHOD COMPUTER ENGINEERING DEPARTMENT GUJARAT POWER ENGINEERING & RESEARCH INSTITUTE Advance Processor.
Riyadh Philanthropic Society For Science Prince Sultan College For Woman Dept. of Computer & Information Sciences CS 251 Introduction to Computer Organization.
The 8086 Microprocessor The 8086, announced in 1978, was the first 16-bit microprocessor introduced by Intel Corporation 8086 is 16-bit MPU. Externally.
CEG 320/520: Computer Organization and Assembly Language ProgrammingIntel Assembly 1 Intel IA-32 vs Motorola
An Introduction to 8086 Microprocessor.
CDP ECE Spring 2000 ECE 291 Spring 2000 Lecture 7: More on Addressing Modes, Structures, and Stack Constantine D. Polychronopoulos Professor, ECE.
Dr. José M. Reyes Álamo 1.  The 80x86 memory addressing modes provide flexible access to memory, allowing you to easily access ◦ Variables ◦ Arrays ◦
1.4 INTRODUCTION TO PROGRAM SEGMENTS
1/2002JNM1 Positional Notation (Hex Digits). 1/2002JNM2 Problem The 8086 has a 20-bit address bus. Therefore, it can access 1,048,576 bytes of memory.
MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR1 Addressing Mode.
Low Level Programming Lecturer: Duncan Smeed Overview of IA-32 Part 1.
Types of Registers (8086 Microprocessor Based)
INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING
The x86 Architecture Lecture 15 Fri, Mar 4, 2005.
Microprocessors Monday, Apr. 13 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University.
ECE291 Computer Engineering II Lecture 3 Josh Potts University of Illinois at Urbana- Champaign.
UHD:CS2401: A. Berrached1 The Intel x86 Hardware Organization.
Assembly Language. Symbol Table Variables.DATA var DW 0 sum DD 0 array TIMES 10 DW 0 message DB ’ Welcome ’,0 char1 DB ? Symbol Table Name Offset var.
Computers organization & Assembly Language Chapter 1 THE 80x86 MICROPROCESSOR.
ECE291 Computer Engineering II Lecture 3 Dr. Zbigniew Kalbarczyk University of Illinois at Urbana- Champaign.
Review of Assembly language. Recalling main concepts.
3.4 Addressing modes Specify the operand to be used. To generate an address, a segment register is used also. Immediate addressing: the operand is a number.
Internal Programming Architecture or Model
Intel 8086 MICROPROCESSOR ARCHITECTURE
Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University.
Intel MP Organization. Registers - storage locations found inside the processor for temporary storage of data 1- Data Registers (16-bit) AX, BX, CX, DX.
The Microprocessor & Its Architecture A Course in Microprocessor Electrical Engineering Department Universitas 17 Agustus 1945 Jakarta.
Chapter 12 Processor Structure and Function. Central Processing Unit CPU architecture, Register organization, Instruction formats and addressing modes(Intel.
Assembly language programming
Instruction set Architecture
Format of Assembly language
Data Transfers, Addressing, and Arithmetic
Introduction to 8086 Microprocessor
8086 Microprocessor.
Instruksi Set Prosesor 8088
ADDRESSING MODES.
Microprocessor and Assembly Language
Microprocessor and Assembly Language
Basic Microprocessor Architecture
Assembly IA-32.
ADDRESSING MODES.
Intel 8088 (8086) Microprocessor Structure
Defining Types of data expression Dn [name] expression Dn [name]
Symbolic Instruction and Addressing
Introduction to Assembly Language
BIC 10503: COMPUTER ARCHITECTURE
Data Addressing Modes • MOV AX,BX; This instruction transfers the word contents of the source-register(BX) into the destination register(AX). • The source.
Intel 8088 (8086) Microprocessor Structure
Morgan Kaufmann Publishers Computer Organization and Assembly Language
Symbolic Instruction and Addressing
CS 301 Fall 2002 Computer Organization
The Microprocessor & Its Architecture
Symbolic Instruction and Addressing
Lecture 06 Programming language.
Computer Architecture CST 250
8051 ASSEMBLY LANGUAGE PROGRAMMING
Chapter 6 –Symbolic Instruction and Addressing
Chapter 8: Instruction Set 8086 CPU Architecture
Part I Data Representation and 8086 Microprocessors
Presentation transcript:

Faculty of Engineering, Electrical Department, Microprocessors Sunday, Mar. 30 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Topics of Today Reading: Mazidi: Section 1.5: More about Segments in the 80x86. (Cont.) Section 1.6: 80x86 Addressing Modes. Section 2.0: Assembly Language Programming. Section 2.1: Directives and a Sample Program. Section 2.3: More Sample Programs.

Topics of Today More About Segments in the 80x86. (Cont.) 80x86 Addressing Modes. Assembly Language Programming. Directives and a Sample Program. More Sample Programs.

More about Segments in the 80x86 Flag Register: A 16-bit register, sometimes referred to as the status register. Although 16-bits wide, only some of its bits are used. The rest are either undefined or reserved by Intel. Many Assembly language instructions change flag register bits. Some instructions function differently based on the information in the flag register.

More about Segments in the 80x86 Flag Register: (Cont.) Six flags, called conditional flags, indicate some conditions resulting after an instruction executes.

More about Segments in the 80x86 Flag Register: (Cont.) Three flags, called control flags, control the operation of instructions before they are executed.

More about Segments in the 80x86 Bits of the Flag Register: Bits used in x86 Assembly language programming, with a brief explanation each: CF (Carry Flag): Set when there is a carry out, from d7 after an 8-bit operation, or d15 after a 16-bit operation. Used to detect errors in unsigned arithmetic operations. PF (Parity Flag): After certain operations, the parity of the result's low-order byte is checked. If the byte has an even number of 1s, the parity flag is set to 1; otherwise, it is cleared.

More about Segments in the 80x86 Bits of the Flag Register: (Cont.) Bits used in x86 Assembly language programming, with a brief explanation each: AF (Auxiliary Carry Flag): If there is a carry from d3 to d4 of an operation, this bit is set; otherwise, it is cleared. Used by instructions that perform BCD arithmetic. ZF (Zero Flag): Set to 1 if the result of an arithmetic or logical operation is zero; otherwise, it is cleared.

More about Segments in the 80x86 Bits of the Flag Register: (Cont.) Bits used in x86 Assembly language programming, with a brief explanation each: SF (Sign Flag): Binary representation of signed numbers uses the most significant bit as the sign bit. After arithmetic or logic operations, the status of this bit is copied into the SF, indicating the sign of the result. OF (Overflow Flag): Set when the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit. Used only to detect errors in signed arithmetic operations.

More about Segments in the 80x86 Flag Register and ADD Instruction: Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Flag bits that are affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag). Example (2):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Same concepts are applied for 16-bit addition. Differences between 8- and 16-bit operations in terms of impact on the flag bits. The parity bit (PF) only counts the lower 8 bits of the result and is set accordingly. The carry flag (CF) is set if there is a carry beyond bit d15 instead of bit d7.

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Example (1):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Example (2):

More about Segments in the 80x86 Flag Register and ADD Instruction: (Cont.) Instructions such as MOV (data transfers) affect no flags. Example:

More about Segments in the 80x86 Use of Zero Flag for Looping: A widely used application of the flag register is the use of the zero flag to implement program loops. A loop is a set of instructions repeated a number of times. As an example, to add 5 bytes of data, a counter can be used to keep track of how many times the loop needs to be repeated. Each time the addition is performed the counter is decremented and the zero flag is checked. When the counter becomes zero, the zero flag is set (ZF = 1) and the loop is stopped.

More about Segments in the 80x86 Use of Zero Flag for Looping: (Cont.) Example: Register CX is used to hold the counter. BX is the offset pointer.

More about Segments in the 80x86 Use of Zero Flag for Looping: (Cont.) Example: AL is initialized before the start of the loop. In each iteration, ZF is checked by the JNZ instruction JNZ stands for "Jump Not Zero“, meaning that if ZF = 0, jump to a new address. If ZF = 1, the jump is not performed, and the instruction below the jump will be executed.

More about Segments in the 80x86 Use of Zero Flag for Looping: (Cont.) Example: JNZ instruction must come immediately after the instruction that decrements CX. JNZ needs to check the effect of "DEC CX" on ZF. If any instruction were placed between them, that instruction might affect the zero flag.

Topics of Today More About Segments in the 80x86. (Cont.) 80x86 Addressing Modes. Assembly Language Programming. Directives and a Sample Program. More Sample Programs.

8086 Addressing Modes The CPU can access operands (data) in various ways called addressing modes. The 8086 provides seven addressing modes: Register. Immediate. Direct. Register indirect. Based relative. Indexed relative. Based indexed relative.

8086 Addressing Modes Register Addressing Mode: Use registers to hold data to be manipulated. Memory is not accessed, so this mode is very fast. Example: Source and destination registers should match in the size. Otherwise, it will give an error.

8086 Addressing Modes Immediate Addressing Mode: As the name implies, the operand comes immediately after the opcode. The source operand is a constant. This mode can be used to load information into any register except the segment and flag registers. Example:

8086 Addressing Modes Immediate Addressing Mode: (Cont.) To move information to the segment registers, the data must first be moved to a general-purpose register, then to the segment register. Example: This will be illegal:

8086 Addressing Modes Immediate Addressing Mode: (Cont.) The letter H is used to indicate hexadecimal data. If hexadecimal data begin with a letter, the assembler requires the data start with a 0. To represent the hexadecimal value F2, 0F2H is used in assembly language. Decimal data are represented as it is and require no special codes or adjustments. An example is the 100 decimal in the instruction: “MOV AL,100”.

8086 Addressing Modes Immediate Addressing Mode: (Cont.) An ASCII-coded character or characters may be depicted in the immediate form if the ASCII data are enclosed in apostrophes. Binary data are represented if the binary number is followed by the letter B.

8086 Addressing Modes Direct Addressing Mode: In this mode, data is in some memory location(s). Used in most programs (data to be processed is often in some memory location outside the CPU). The address of the data in memory comes immediately after the instruction. The address of the operand is provided with the instruction, as an offset address. Calculate the physical address by shifting left the DS register and adding it to the offset:

8086 Addressing Modes Direct Addressing Mode: (Cont.) Example: Note the bracket around the address. If the bracket is absent, executing the command will give an error, as it will be interpreted as to move the value 2400 (16-bit data) into register DL, which is an 8-bit register.

8086 Addressing Modes Direct Addressing Mode: (Cont.) The MOV instruction transfers data between a memory location within the data segment, and the AL (8-bit), AX (16-bit), or EAX (32-bit) registers. Usually a 3-byte long instruction. Example: MOV AL, DATA loads AL from the data segment memory location DATA (e.g., 1234H). DATA is a symbolic memory location, while 1234H is the actual hexadecimal location.

8086 Addressing Modes Register Indirect Addressing Mode: In this mode, the address of the memory location where the operand resides is held by a register. The registers used for this purpose are SI, DI and BX. If these three registers are used as pointers, they must be combined with DS in order to generate the 20-bit physical address. Example: Notice that BX is in brackets. The physical address is calculated by shifting DS left one hex position and adding BX to it.

8086 Addressing Modes Register Indirect Addressing Mode: (Cont.) The same rules apply when using register SI or DI. The following example shows 16-bit data:

8086 Addressing Modes Register Indirect Addressing Mode: (Cont.) The data segment (DS) is used by default with register indirect addressing or any other mode that uses BX, DI, or SI to address memory. If the BP register addresses memory, the stack segment is used by default. These settings are considered the default for these four index and base registers. For the 80386 and above: EBP addresses memory in the stack segment by default. EAX, EBX, ECX, EDX, EDI, and ESI address memory in the data segment by fault.

8086 Addressing Modes Register Indirect Addressing Mode: (Cont.) Indirect addressing allows a program to refer to tabular data (tables or arrays) located in memory. To accomplish this task: Load the starting location of the table (array) into the BX register with a MOV immediate instruction. Use register indirect addressing to store the samples sequentially (50 for example).

8086 Addressing Modes Based Relative Addressing Mode: In this mode, base registers BX & BP, or a displacement value, are used to calculate the effective address. Default segments used for the calculation of the physical address are DS for BX and SS for BP. Alternatives are "MOV CX,[BX+10]" or "MOV CX,10[BX]" Again the low address contents will go into CL and the high address contents into CH.

8086 Addressing Modes Based Relative Addressing Mode: (Cont.) In the case of the BP register: Alternatives are "MOV AL,[BP+5]" or "MOV AL,5[BP]". BP+5 is called the effective address since the fifth byte from the beginning of the offset BP is moved to register AL.

8086 Addressing Modes Indexed Relative Addressing Mode: This mode works the same as the based relative addressing mode, except that registers DI & SI hold the offset address.

8086 Addressing Modes Indexed Relative Addressing Mode: (Cont.) Example:

8086 Addressing Modes Indexed Relative Addressing Mode: (Cont.) Example:

8086 Addressing Modes Based Indexed Addressing Mode: By combining based & indexed addressing modes: one base register and one index register are used. The coding of the instructions can vary.

8086 Addressing Modes Based Indexed Addressing Mode: (Cont.) The base register often holds the beginning location of a memory (e.g., array). The index register holds the relative position of an element in the array. Whenever BP addresses memory data, both the stack segment register and BP generate the effective address.

8086 Addressing Modes Based Indexed Addressing Mode: (Cont.) A major use is to address elements in a memory array. To accomplish this: Load the BX register (base) with the beginning address of the array and the DI register (index) with the element number to be accessed.

8086 Addressing Modes Segment Overrides: The x86 CPU allows the program to override the default segment and use any segment register. Example: In "MOV AL,[BX]", the physical address of the operand to be moved into AL is DS:BX. To override that default, specify the desired segment in the instruction as "MOV AL, ES:[BX]”.

8086 Addressing Modes

Topics of Today More About Segments in the 80x86. (Cont.) 80x86 Addressing Modes. Assembly Language Programming. Directives and a Sample Program. More Sample Programs.

Assembly Language Programming An Assembly language program is a series of statements, or lines. Either Assembly language instructions, or statements called directives. Directives (pseudo-instructions) give directions to the assembler about how it should translate the Assembly language instructions into machine code. Assembly language instructions consist of four fields: [label:] mnemonic [operands][;comment] Brackets indicate that the field is optional. Do not type in the brackets.

Topics of Today More About Segments in the 80x86. (Cont.) 80x86 Addressing Modes. Assembly Language Programming. Directives and a Sample Program. More Sample Programs.

Directives and a Sample Program Assembly Language Instructions: [label:] mnemonic [operands][;comment] The label field allows the program to refer to a line of code by name. The label field cannot exceed 31 characters. A label must end with a colon when it refers to an opcode generating instruction.

Directives and a Sample Program Assembly Language Instructions: (Cont.) [label:] mnemonic [operands][;comment] The mnemonic (instruction) and operand(s) fields together accomplish the tasks for which the program was written. The mnemonic opcodes are ADD and MOV.

Directives and a Sample Program Assembly Language Instructions: (Cont.) [label:] mnemonic [operands][;comment] The mnemonic (instruction) and operand(s) fields together accomplish the tasks for which the program was written. "AL,BL" and "AX,6764" are the operands. Instead of a mnemonic and operand, these fields could contain assembler pseudo-instructions, or directives. Directives do not generate machine code and are used only by the assembler as opposed to instructions.

Directives and a Sample Program Assembly Language Instructions: (Cont.) Examples of directives: DB, END, ENDP.

Directives and a Sample Program Assembly Language Instructions: (Cont.) [label:] mnemonic [operands][;comment] The comment field begins with a ";" and may be at the end of a line or on a line by themselves. The assembler ignores comments. Comments are optional, but highly recommended to make it easier to read and understand the program.

Directives and a Sample Program Model Definition: Two comments, then the .MODEL directive.

Directives and a Sample Program Model Definition: (Cont.) This directive selects the size of the memory model.

Directives and a Sample Program Model Definition: (Cont.) Other the options for the memory model are: .SMALL, .MEDIUM, .COMPACT, .HUGE, .TINY and .LARGE

Directives and a Sample Program Segment Definition: Every line of an Assembly language program must correspond to one x86 CPU segment register. CS (code segment); DS (data segment). SS (stack segment); ES (extra segment). The simplified segment definition format uses three simple directives: ".CODE" ".DATA" ".STACK” Which correspond to the CS, DS, and SS registers.

Directives and a Sample Program Segments of a Program: The stack segment defines storage for the stack. The data segment defines the data the program will use. The code segment contains Assembly language instructions.

Directives and a Sample Program Segments of a Program: (Cont.) Stack segment: This directive reserves 64 bytes of memory for the stack.

Directives and a Sample Program Segments of a Program: (Cont.) Data segment: The data segment (in this program) defines three data items: DATA1, DATA2, and SUM. Data items defined in the data segment will be accessed in the code segment by their labels.

Directives and a Sample Program Segments of a Program: (Cont.) Data segment: The DB (Define Byte) directive is used by the assembler to allocate memory in byte-sized chunks. Memory can be allocated in different sizes (e.g., DW (Define Word)).

Directives and a Sample Program Segments of a Program: (Cont.) Data segment: DATA1 and DATA2 are given initial values in the data section. SUM is not given an initial value, but storage is set aside for it.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: Defined by the .CODE directive.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: First line of the segment after the .CODE directive is the PROC directive. A procedure is a group of instructions designed to accomplish a specific function. A code segment is organized into one or several small procedures to make the program more structured.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: First line of the segment after the .CODE directive is the PROC directive. The PROC directive may have the option FAR or NEAR. DOS requires the entry point to the user program to be a FAR procedure.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: Every procedure must have a name defined by the PROC directive, followed by the assembly language instructions, and closed by the ENDP directive. The PROC and ENDP statements must have the same label.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: Before the OS (DOS) passes control to the program so it may execute, it assigns segment registers values. When the program begins executing, only CS and SS have the proper values (by DOS). DS and ES values are initialized by the program.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: Example: The program loads AL & BL with DATA1 & DATA2, ADDs them together, and stores the result in SUM.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: Example: The last instructions, "MOV AH,4CH" & "INT 21H“, return control to the operating system.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: Example: The last two lines end the procedure & program. The label for ENDP (MAIN) matches the label for PROC.

Directives and a Sample Program Segments of a Program: (Cont.) Code segment: A sample shell: fill in it with the instructions and data for your program.

Topics of Today More About Segments in the 80x86. (Cont.) 80x86 Addressing Modes. Assembly Language Programming. Directives and a Sample Program. More Sample Programs.

More Sample Programs Program 2-1: (Add 5 bytes of data):

More Sample Programs Analysis of Program 2-1: Load the value 05 into the CX register. Used by the program as a counter for iterations (looping).

More Sample Programs Analysis of Program 2-1: Load into BX the offset address assigned to DATA. The assembler starts at offset 0000 and uses memory for the data, then assigns the next available offset memory for SUM (in this case, 0005).

More Sample Programs Analysis of Program 2-1: Adds the contents of the memory location pointed at by the register BX to AL.

More Sample Programs Analysis of Program 2-1: Increments the pointer by adding 1 to BX. This will cause BX to point to the next data item. (next byte).

More Sample Programs Analysis of Program 2-1: Decrement (subtract 1 from) the CX counter (will set the zero flag high if CX becomes zero).

More Sample Programs Analysis of Program 2-1: Jump back to the label AGAIN as long as the zero flag is indicating that CX is not zero. Will not jump only after the zero flag has been set high by the "DEC CX" instruction (CX becomes zero). When CX becomes zero, this means that the loop is completed and all five numbers have been added to AL.

More Sample Programs Various Approaches to Program 2-1: Variations of Program 2-1 clarify the use of addressing modes, and show that the x86 can use any general-purpose register for arithmetic and logic operations.

More Sample Programs Various Approaches to Program 2-1:

More Sample Programs Program 2-2: (Add 4 words of data): The 16-bit data (a word) is stored with the low-order byte first ("little endian“). E.g., 234DH, 4DH will be stored at address 0000H and 23H at 0001H.

More Sample Programs Program 2-2: (Add 4 words of data): The address pointer is incremented twice, since the operand being accessed is a word (two bytes). The program could have used "ADD DI,2" instead of using "INC DI" twice.

More Sample Programs Program 2-2: (Add 4 words of data): ORG directive tells the assembler that the address of next memory location (SUM) will be at 0010H (instead of 0008H, after input data). Load the pointer (address) for the memory allocated for the label SUM.

More Sample Programs Program 2-2: (Add 4 words of data): Moves the contents of register BX to memory locations with offsets 0010H and 0011H.

More Sample Programs Program 2-3: (Transfer 6 bytes of data):

More Sample Programs Analysis of Program 2-3: C4 was coded in the data segments as 0C4H, (0 is required if the first digit is a hex letter A through F).

More Sample Programs Analysis of Program 2-3: The program uses registers SI & DI as pointers to the data items being manipulated. SI is a pointer to the data items to be copied (source pointer). DI points to the location the data is copied to (destination pointer). At each iteration of the loop, both data pointers are incremented to point to the next byte.

Questions?