1. Lecture 06
Programming language

2. Programming language Programmer’s Point-of-view
High-Level Programming Languages
Assembly Language
Machine code
Logic Gates
Transistor Level
Working at Higher Levels:
Programming is easier
Programs are more portable (hardware independent)
Little or no knowledge if machine required
Working at Lower Levels:
More control over the machine
Possible to write very small, efficient programs

3. Introduction to Assembly Programming
Assembly language is referred to as a low-level language because it deals directly with internal structure of the CPU
Programmer must know the number of registers and their size as well as another of the CPU.
In High-level languages the programmer does not have to be concerned with internal details of the CPU.
Assembly language line consist of
Mov & ADD Instruction
operands destination source; comment
Mov BL, 22H ;copy source operand to destination
Mov AL, 25H ;move 25 into AL
Mov Bl, 34H ;move 34 into BL
ADD AL, BL ;AL = AL + BL

4. 16 bit 8086 microprocessor
Data can be moved among all registers except the flag register, MOV FR, AX;
Source and destination registers match in size
Mov BL,7F2H; illegal
Mov AX,2FE24H; illegal
Values cannot be loaded directly into any segment register (CS,ES,ES, or SS), to load a value into a segment register, first load it to nonsegment register and then move it to the segment register
Mov AX,2345H; load 2345H into AX
Mov DS,AX; then load the value of AX into DS

5. Logical & Physical Address
Physical Address Is the 20-bit address that actually put is the address bus. (8086)
Has range of 00000H-FFFFFH
Offset Address is a location within 64k byte segment range
Has range of 0000H-FFFFH
Logical Address consist of segment address and offset address
Physical address is generated by shifting the segment one hex digit to the left and adding offset
Example: 2500:95F3H
Shifting the segment 25000
Add the offset f3 = 2E5F3

6. Logical & Physical Address
Addressing in code segment to execute a program, the 8086 fetches the instruction from the code segment.
The logical address of instruction consist of CS (code segment) and IP (instruction pointer)
Example: the logical address is CS:IP : 95F3H

7. Logical & Physical Address
Addressing in data segment associated with offset BX, SI, and DI
Example: the logical address is DS = 5000 and the offset is 1950.

8. Storage of Data Structure
Big Endian and Little Endian
For multiple-byte data items stored in memory, need to specify which order:
Most Significant 8 bits at lowest address ("Big Endian"), OR
Least Significant 8 bits at lowest address ("Little Endian")
Little Endian: 80x86
Big Endian: mc680x0, SPARC, HP Precision (Vipers)

9. Storage of Data Structure in 80x86
MOV AX, 35F3H ; load 35F3H into AX
MOV [1500], AX ; copy the contents of AX to offset 1500H
In cases like this, the lower byte goes to the low memory location and the high byte goes to the high memory address
DS:1500 = F3 DS:1501 = 35
Example: assume memory locations with the following contents
DS:6826 = 48, and DS:6827 = 22 show the contents of register BX in the instruction MOV BX, [6826]
BX = 2248H BL BH 48 22

10. Offset Register for Various Segments
Memory Map of the IBM PC
Offset Register for Various Segments SS ES DS CS
Segments Register
SP, BP
SI, DI, BX IP
Offset Registers
Extra segment register used as extra data segment. In many normal programs this segment is not used.

11. Pushing and Popping Operations
What is a stack, and why is it needed?
The stack is a section of read/write memory (RAM) used by CPU to store information temporality. CPU needs this storage area since there are only limited number of register
Every register in the CPU (except segment register and SP) can be stored in the stack and loaded from the stack.

12. Pushing and Popping Operations
Pushing onto the stack storing the CPU register in the stack is called a push.
Example: SP = 1236, AX = 24B6, DI = 85C2, DX = 5F93.
Instruction is executed
Push AX
Push DI
Push DX

13. Pushing and Popping Operations
Popping the stack loading the contents of the stack into the CPU register is called a pop.
Example: assume that the stack is shown below, and SP=18FA, show the contents of the stack and register as each of the following instruction is executed
pop CX
pop DX
pop BX

14. Logical and physical address of the stack
Physical address depends on the value of stack segment and stack pointer registers
Example: if SS = 3500H and SP = FFFEH calculate
Physical address = FFFEH = 44FFE
Lower range of the stack = = 35000
Upper range of the stack = FFFF = 44FF
Show the logical address = 3500 : FFFE

15. The Flag register and the bit fields
The flag register is a 16 bit register sometimes referred as the status register
Not all bits are used

16. Function
Name
Position