BJT Band diagram Analysis تجزيه وتحليل دياگرام باند انرژي

W P N The “typical” electron travels into the p-type region a distance given by D is the diffusion coefficient (technically, the minority carrier diffusion coefficient) t is the lifetimetime (technically, the minority carrier lifetime) W The diffusion length L can easily by ~100 x times larger than the depletion width W Diffusion (injection) Recombination (excess e- combine with holes) How far does an electron go into the p-type region before it finds a “hole” to recombine with?

Transistors (Transfer Resistor) Transistors Junction-FETs (JFETS) Field Effect TransistorsBipolar transistors Insulated Gate FET’s MOSFETs NPN,PNP N-channel, P-channel Enhancement, Depletion N-channel, P-channel

The bipolar junction transistor (BJT) N P P B C E C B E P N N B C E B C E B C E C B E NPN PNP Arrow always points away from base and toward emitter My pneumonic: No Point iN Arrow always points away from emitter towards base My pneumonic: Points IN

Diffusion Drift Diffusion Drift At equilibrium: BaseCollectorEmitter

C B E P N N }} This junction is reverse-biased This junction is forward-biased B C E “Quasi”-Fermi level Since we are not at thermodynamic equilibrium, we cannot define a single chemical potential (Fermi level) is everywhere A Quasi – fermi-level can be used to describe the local equilibrium of electrons and holes In Use: Forward bias one p-n junction, and reverse-bias the other

P N N B C E W (Width of depletion region) L Diffusion Physical thickness of base There are three important length scales that are relevant to understanding how a transistor operates:

Diffusion Drift P N N }} This junction is reverse-biased This junction is forward-biased B C E Basis of bipolar transistor operation: 1) The Base-emitter junction is forward-biased: Electrons flow from the emitter to the base, just like in a normal forward-biased diode 2) Because the base is very thin, electrons continue to move through the base and find themselves at the collector-base junction. Once they ‘feel’ the large electric field at this junction, they are pushed downhill to the collector. Only a very small fraction (typically ~ 1% - 3%) of the electrons come out through the base; the remaining 97%-99% come out through the collector.

When base is made very thin, I C >>I B VCVC VBVB VEVE IBIB IBIB IEIE V BE V CB P N N B C E VCVC IBIB VEVE IEIE IBIB When base is made very thin, I C >>I B and I C ~I E Bipolar transistor can be considered a current amplifier: If one can control the base current, then this will induce a much larger change in the current in the collector and in the emitter. a=I C /I E 1-a=I B /I E is the current gain of a transistor. b is commonly ~30-100

VCVC VBVB VEVE IBIB IBIB IEIE V BE V CB If V CB constant, then as V BE is increased, current I C and I B increase exponentially V BE I C ~I E B DV B Small wiggle in V B, DV B, induces large change in I C. By Ohm’s Law, the voltage across R C shows a big change. So, Small DV B  Big DV RE Bipolar transistor as a voltage amplifier = Transistor + resistor(s) V RE Collector resistor

Field-effect Transistors Main differences from bipolar transistors: 1)Use an electric field, established by applying a voltage to a “gate” electrode, to control current flow (voltage in  Voltage out) 2) Ideally, no current flow at all into the “gate” electrode. Important: No current implies no power dissipation, at least under certain conditions Two fundamentally different types: 1) Junction FET (J-FET) 2) IGFET (insulated-gate FET) The MOSFET (Metal-oxide-semiconductor FET) is the most common type Relies on a reverse-biased PN junction to prevent current flow in the gate

n p p Depletion region e-e- e-e- e-e- e-e- e-e- + - Source (S)Drain (D) Gate (G) Gate forms a diode (p-n) junction with source and drain JFET is always operated under conditions where this diode junction is reverse-biased, so that only very little current flows from the gate to the source or the drain N-channel JFET

Depletion region is larger on the right-hand side because the green region is more positive on the right than on the left (due to VSD), so the Gate-Drain junction is reverse-biased more strongly than the gate-source junction is. n p p Depletion region e-e- e-e- e-e- e-e- + - S D G G + V SD V GS connection so both gate electrodes have the same voltage - n p p e-e- e-e- e-e- e-e- + - S D G G + V SD V GS - “Pinch-off” Larger (more negative) V GS Small, negative V GS n-channel SYMBOL:

V ”pinch-off” I DS V ”pinch-off” Larger (more positive) V DS V DS I DS Purely resistive here (silicon acts like a resistor) Current goes up less quickly as depetion region narrows Once pinch-off occurs, no further increase i n current pinch-off V DS I DS pinch-off V GS ~0 V GS ~ -1.0 V V GS ~ -2.0 V V GS n-channel SYMBOL:

Everywhere switch N, P Switch signs of all voltage sources and currents p n n Depletion region + - Source (S)Drain (D) Gate (G) h+ p n n + - S D G G + V SD V GS - “Pinch-off” V DS -I DS pinch-off V GS ~0 V GS ~ +1.0 V V GS ~ +2.0 V

IGFET (Insulated-gate FET) Insulator Metal (G) SiO 2 Metal SD Semiconductor CB VB Gate (G) Body p-Silicon SD n-Si 4 terminals: Source, Drain, Gate, and “Body” (sometimes called “Substrate”)

SiO 2 Metal Gate (G) Body p-Silicon SD n-Si diode-like junction here (and similarly at drain) For VG<0, the p-type silicon is in depletion or possibly accumulation. It forms resistive p-n junctions with the source and drain. For VG>0, the p-type silicon goes into depletion. When VG is large and positive, enough electrons are attracted to the near-surface region that the region right under the SiO 2 becomes inverted, and electrons can from from the source to the drain. SiO 2 Metal Gate (G) Body p-Silicon SD n-Si Inverted region With V G =0 With V G >0

CB VB CB VB Depletion CB VB Inversion CB Accumulation VB Small negative gate (for n-type sample) Surface becomes resistive, but electrons still majority carrier Large negative gate (for n-type sample) Surface becomes p-type, as holes become majority carrier at surface positive gate (for n-type sample) Surface remains n- type, but becomes more conductive “flat-band” condition As a function of gate voltage, three different characteristic behaviors:

CB VB e- CB VB If metal has smaller work function, then when connected by a wire, Electrons move from metal to semiconductor, making semiconductor Negaitve and metal positive until their Fermi levels line up

CB VB CB VB Depletion CB VB Inversion CB Accumulation VB Small positive gate (for p-type sample) Surface becomes resistive, but holes still majority carrier Large positive gate (for p- type sample) surface becomes n-type, as electrons become majority carrier at surface negative gate (for p-type sample) Surface remains p- type, but becomes more conductive “flat-band” condition As a function of gate voltage, three different characteristic behaviors:

CB VB

SiO 2 Metal Gate (G) Body p-Silicon SD n-Si diode-like junction here (and similarly at drain) Body is always held at potential of drain or possibly biased more negatively (to reverse bias the S and D junctions to the p-type Body) Applying a voltage to the gate controls whether the near-surface region is in accumulation, depletion, or inversion

SiO 2 Metal Gate (G) Body p-Silicon SD n-Si diode-like junction here (and similarly at drain) For VG<0, the p-type silicon is in depletion or possibly accumulation. It forms resistive p-n junctions with the source and drain. For VG>0, the p-type silicon goes into depletion. When VG is large and positive, enough electrons are attracted to the near-surface region that the region right under the SiO 2 becomes inverted, and electrons can from from the source to the drain. SiO 2 Metal Gate (G) Body p-Silicon SD n-Si Inverted region With V G =0 With V G >0