Impulse Embedded Processing Video Lab Generate FPGA hardware Generate hardware interfaces HDL files HDL files FPGA bitmap FPGA bitmap C language software.

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Presentation transcript:

Impulse Embedded Processing Video Lab Generate FPGA hardware Generate hardware interfaces HDL files HDL files FPGA bitmap FPGA bitmap C language software Compile and optimize ISE™ Design Suite

Page 2 Workshop Agenda  Step-By-Step Creation of a Streaming Video Application: –You will learn how to: Use Xilinx reference hardware and software for fast development Combine multiple streaming video filters in a single application Use Xilinx Platform Studio (XPS) for system integration Use an embedded MicroBlaze processor for video control Combine multiple methods of design into a single project –Steps: Start with a ready-to-use video reference design Add a custom object detection and highlighting filter to the video stream Control and configure the filter using an embedded MicroBlaze processor Rebuild the project and test the enhanced video processing design

Page 3 Video Design Overview DVI DVI In Gamma In 2D FIR Filter Gamma Out DVI Out Xilinx MicroBlaze Processor Xilinx MicroBlaze Processor The MicroBlaze processor will be used to dynamically configure filters Filter control (UART) Processor Local Bus (PLB) Fish Finder Filter Custom C-language filter

Page 4 Video Starter Kit Hardware

Page 5 Test the Pass-through Example Using Flash  Setup the Video Components –720p resolution video source TViX player, laptop computer or other DVI/HDMI source –Xilinx Video Starter Kit Spartan 3 Edition used for this workshop –Video monitor Supporting 1280 x 720 resolution  Power Up and test the Video –Start video source (“play”) –Xilinx reference designs will boot from Flash card –Press center push-button to load the DVI pass-through example –Verify video is displayed on monitor

Page 6 Load Project_2_Passthrough_Completed Xilinx Platform Studio™ Project Information Area Console Window System Assembly View

Page 7 Test the Pass-Through Example 12

Page 8 Examining the Impulse C Code The Impulse C-to-FPGA compiler generates parallel FPGA hardware from sequential software… C-language in, HDL out! The compiler also generates hardware interfaces such as DVI for video and PLB for processor I/O Compiler “export” scripts are used to generate auxiliary files as needed by Xilinx ISE Design Suite DVI Generate FPGA hardware Generate hardware interfaces HDL files HDL files FPGA bitmap FPGA bitmap C language software Compile and optimize ISE™ Design Suite

Page 9 Open the Fish Finder Impulse C Project

Page 10 Fish Finder C-Code Design Review The Fish Finder algorithm is described using a C-language subroutine with streaming I/O interfaces…

Page 11 Fish Finder C-Code Design Review Video I/O is described using Impulse C types and functions: Fish Finder Filter

Page 12 Fish Finder C-Code Design Review DVI streaming video is represented as 27-bit integer data (24-bits of color, vsync, hsync and de): Fish Finder Filter Unpacking a 27-bit video pixel and looking for start-of-frame… Packing and writing a filtered pixel…

Page 13 Fish Finder C-Code Design Review Loop pipelining and pipeline stage depth are easily specified using two pragmas in the C code… Automatic parallelizing of C statements enables complex, real-time processing of video signals.

Page 14 Fish Finder C-Code Design Review These C statements create a spotlight effect, using simple geometry to calculate the radius:

Page 15 Fish Finder Software Simulation Software simulation of a single frame…

Page 16 Fish Finder Hardware Generation 1.Choose a Platform Support Package (Xilinx DVI Video with PLB) 2.Specify an export directory 3.Generate hardware 4.Export hardware and software

Page 17 Fish Finder Hardware Optimization Interactive pipeline optimization and analysis helps to quickly converge on the right solution for high-throughput video: The dataflow graph shows how the C- language statements were automatically parallelized by the compiler. The pipelining rate is critical for processing video signals at pixel-rate. A rate of 1 means a perfect video pipeline. Max Unit Delay helps you to understand and control timing and clock rates.

Page 18 Add Fish Finder Filter to the EDK Project After generating and exporting the hardware from the Impulse environment, we can important into Platform Studio as a pcore:

Page 19 Connect Fish Finder Filter to PLB and DVI

Page 20 Connect Clocks and Reset

Page 21 Generate Addresses Note: addresses generated may be different than shown above

Page 22 Modify the Software Application We will modify the software application to add in the new Fish Finder menu and add the related filter control code.

Page 23 Modify the Software Application Remove the leading comment characters (//) This change will enable the new menu feature:

Page 24 Fish Finder C-Code Design Review Communication between MicroBlaze and Fish Finder is described using Impulse C co_stream API functions: Writing a configuration word from the MicroBlaze application… Polling to read the configuration word in the hardware process…

Page 25 Add New Sources and Headers

Page 26 Add New Sources and Headers

Page 27 Build the Software Application

Page 28 Test the Fish Finder 12

Page 29 For Additional Information