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LAB1 Summary Zhaofeng SJTU.SOME. Embedded Software Tools CPU Logic Design Tools I/O FPGA Memory Logic Design Tools FPGA + Memory + IP + High Speed IO.

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Presentation on theme: "LAB1 Summary Zhaofeng SJTU.SOME. Embedded Software Tools CPU Logic Design Tools I/O FPGA Memory Logic Design Tools FPGA + Memory + IP + High Speed IO."— Presentation transcript:

1 LAB1 Summary Zhaofeng SJTU.SOME

2 Embedded Software Tools CPU Logic Design Tools I/O FPGA Memory Logic Design Tools FPGA + Memory + IP + High Speed IO (4K & Virtex  ) Embedded Software Tools CPU Integration of Functions Time Logic Design Tools Embedded Software Tools Logic + Memory + IP + Processors + RocketIO (Virtex-II Pro  ) Programmable Systems usher in a new era of system design integration possibilities Programmable Systems usher in a new era of system design integration possibilities Integration in System Design

3 PowerPC 405 Core Dedicated Hard IP Flexible Soft IP RocketIO PowerPC-based Full system customization to meet performance, functionality, and cost goals DCR Bus UART GPIO On-Chip Peripheral Hi-Speed Peripheral GB E-Net e.g. Memory Controller Arbiter On-Chip Peripheral Bus OPB Arbiter Processor Local Bus InstructionData PLB DSOCM BRAM ISOCM BRAM Off-Chip Memory ZBT SRAM DDR SDRAM SDRAM Bus Bridge IBM CoreConnect™ on-chip bus standard PLB, OPB, and DCR

4 MicroBlaze Processor-Based Flexible Soft IP MicroBlaze  32-Bit RISC Core UART 10/100 E-Net Memory Controller Off-Chip Memory FLASH/SRAM Fast Simplex Link 0,1….7 Custom Functions Custom Functions BRAM Local Memory Bus D-Cache BRAM I-Cache BRAM Configurable Sizes Possible in Virtex-II Pro Arbiter OPB On-Chip Peripheral Bus CacheLink SRAM

5 Embedded Design in an FPGA Embedded design in an FPGA consists of the following: –FPGA hardware design –C drivers for hardware –Software design Software routines Interrupt service routines (optional) Real Time Operating System (RTOS) (optional)

6 Embedded Development Kit What is Embedded Development Kit (EDK)? –The Embedded Development Kit is the Xilinx software suite for designing complete embedded programmable systems –The kit includes all the tools, documentation, and IP that you require for designing systems with embedded IBM PowerPC™ hard processor cores, and/or Xilinx MicroBlaze™ soft processor cores –It enables the integration of both hardware and software components of an embedded system

7 Embedded Development Tool Flow Overview Data2MEM Download Combined Image to FPGA Compiled ELF Compiled BIT RTOS, Board Support Package Embedded Development Kit Instantiate the ‘System Netlist’ and Implement the FPGA ? HDL Entry Simulation/Synthesis Implementation Download Bitstream Into FPGA Chipscope Standard FPGA HW Development Flow VHDL or Verilog System Netlist Include the BSP and Compile the Software Image ? Code Entry C/C++ Cross Compiler Linker Load Software Into FLASH Debugger Standard Embedded SW Development Flow C Code Board Support Package 1 23 Compiled BIT Compiled ELF

8 Embedded System Tools GNU software development tools –C/C++ compiler for the MicroBlaze ™ and PowerPC ™ processors (gcc) –Debugger for the MicroBlaze and PowerPC processors (gdb) Hardware and software development tools –Base System Builder Wizard –Hardware netlist generation tool: PlatGen –Software Library generation tool: LibGen –Simulation model generation tool: SimGen –Create/Import Peripherals Wizard –Xilinx Microprocessor Debug (XMD) –Hardware debugging using ChipScope ™ Pro Analyzer cores –Eclipse IDE-based Software Development Kit (SDK) –Application code profiling tools –Virtual Platform generator: VPGen –Flash Writer utility

9 Embedded System Tools Board Support Packages (BSPs) –Standalone BSP –Wind River VxWorks –MontaVista Linux –Xilinx MicroKernel (XMK) Xilinx Platform Studio –Xilinx Platform Studio (XPS) is a graphical Integrated Design Environment (IDE) that incorporates all the Embedded System Tools for seamless creation of hardware and software components and, optionally, a verification component

10 Xilinx Platform Studio (XPS) See notes section for detailed explanation

11 XPS Functions XPS HW/SW Simulation HW/SW Debug Hardware Design Software Design Project management –MHS or MSS file –XMP file Software application management Platform management –Tool flow settings –Software platform settings –Tool invocation –Debug and simulation

12 Lab1 ESD on FPGA Lab1.1 Simple Hardware Design Lab1.2 Adding IP to a Hardware Design Lab1.3 Adding Custom IP Lab1.4 Writing Basic Software Applications Lab1.5 Advanced Software Writing Lab1.6 Cross Debugging

13 Create Embedded System using BSB PPC PLB Bus PLB2OPB PLB BRAM Cntlr OPB Bus PLB BRAM Cntlr PLB BRAM INTC GPIO Timer UART MY IP LEDs ICON IBA GPIO Push Buttons DIP Switches Verify HW Operation with generated Test Application

14 Add GPIO Cores PPC PLB Bus PLB2OPB PLB BRAM Cntlr OPB Bus PLB BRAM Cntlr PLB BRAM INTC GPIO Timer UART MY IP LEDs ICON IBA GPIO Push Buttons DIP Switches Add SW code to read state of DIP switches and Push Buttons and display on hyperterm

15 Summary BSB can be used to create a simple processor system targeting a specific hardware board –Generates an MHS text file that describes the embedded system hardware –Generates a Test Application to test memory and peripherals Platform generator converts the MHS to a system netlist The ISE tools generate a bitstream from the system netlist The bitstream was initialized with the software test application in EDK The bitstream was downloaded to the XUP board Output was displayed on hyperterminal

16 两点说明 外部管脚与 UCF 系统工作示意图


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