Differential Amplifiers: Second Stage Dr. Paul Hasler

Differential Transistor Pairs MOSFET Diff-PairBJT Diff-Pair The bottom transistor (the one with I bias ) sets the total current The upper two transistors compete for a fraction of this current

BJT Differential Pair Analysis

Analysis of Diff-Pair Source of Common-Mode Gain

Differential Pair Currents Differential input voltage (V) Output current (nA) I out + I out -

Above V T MOSFET Large-Signal

I SS  i D1  i D2 Start with 2 equations

Above V T MOSFET Large-Signal I SS  i D1  i D2 Start with 2 equations

Above V T MOSFET Large-Signal I SS  i D1  i D2 Start with 2 equations

Above V T MOSFET Large-Signal I SS  i D1  i D2 Start with 2 equations

Above V T MOSFET Large-Signal I SS  i D1  i D2 Start with 2 equations

Gain Changes with Bias Current

Common-Mode Input Range Maximum: Q1 in Forward-activeMinimum: Q3 in Forward-active

MOS Common-Mode Input Range Maximum: M1 in Saturation Minimum: M3 in Saturation v ic (max) = V DD - 0.5I SS R D -v DS1 (sat)+V GS1 = V DD - 0.5I SS R D + V T1 v ic (min) = V SS +v DS3 (sat)+V GS1

Micro-Surgery

Small Signal: BJT Diff-Pair

Common-Mode Circuit

An emitter-degenerated amplifier Gain ~ - R c / (2 R EE )

MOS Common-Mode Circuit

An emitter-degenerated amplifier Gain ~ - R D / (2 R ss )

Differential-Mode Gain

Gain = - g m R c CMRR ~ - 2 g m R E ~ - 2 (I EE / 2 U T ) R E

MOS Differential Mode Circuit

Gain = - g m R D CMRR ~ - g m R ss ~ - (I ss / ( V gs - V T ) ) R ss

Mismatch in Transistor Circuits Outline The general approach to analyzing mismatches Input voltage and current offsets of BJT differential amplifiers Input voltage offsets of MOS differential amplifiers Objective The objective of this presentation is: 1.) Illustrate the method of analyzing mismatches 2.) Analyze the input current and voltage offsets for differential amplifiers

BJT Mismatch Modeling

Mismatch Modeling in MOS

BJT Mismatch Modeling

Differential Amplifiers II Review of Basic Differential Pairs Above Threshold Differential Amplifiers Small-Signal Analysis: Differential and Common mode circuits Modeling of Mismatch