NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 1 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Chemical Mechanical Polishing (CMP) Overview Dr. Stephen Beaudoin Arizona State University Dr. Duane Boning Massachusetts Institute of Technology Dr. Srini Raghavan The University of Arizona  1999 Arizona Board of Regents for The University of Arizona

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 2 Outline CMP Basics CMP Process Optimization Environmental Issues in CMP

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 3 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Learning Objectives Gain the ability to discuss CMP with polishing experts Understand basic phenomena that occur during polishing and will be able to explain why these phenomena occur Become aware of the processing and environmental challenges associated with CMP Learn how to assess the environmental consequences of manufacturing processes and how to compare the impacts of competing processes Gain experience in setting new, more environmentally sound polishing practices

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 4 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing What is CMP? How does CMP work? Why do we need CMP? How do we describe CMP? What are the problems associated with the CMP process? What are the environmental impacts of CMP? How can we alter the environmental impacts of CMP? Questions

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 5 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Basics What is CMP? –CMP is a physico-chemical process used to make wafer surfaces locally and globally flat. –Chemical action hydroxyl ions attack SiO 2 in oxide CMP, causing surface softening and chemical dissolution oxidants enhance metal dissolution and control passivation in metal CMP –Mechanical action polisher rotation and pressure

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 6 CMP Basics (cont’d) How does CMP work? –A rotating wafer is pressed face-down against a rotating polishing pad; an aqueous suspension of abrasive (slurry) is pressed against the face of the wafer by the pad. –A combination of chemical and physical effects removes features from the wafer surface.

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 7 CMP Apparatus

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 8 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Basics (cont’d) Why do we need CMP? –for precise photolithography for advanced devices –for advanced multilevel metallization processes (Damascene) How is CMP described? –key parameter: post-polish nonuniformity (NU) NU = ratio of the standard deviation of the post-polish wafer thickness to the average post-polish wafer thickness caused by variations in local removal rate –important parameter is removal rate (RR) RR = average thickness change during polishing divided by polishing time

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 9 Metal Damascene Process Trenches/vias etched into ILD (interlayer dielectric) Metal deposition Metal CMP Repeat for multiple levels of metal

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 10 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Consumables Slurries for oxide (SiO 2 ) polishing –colloidal suspension of silica particles in alkaline medium –hydroxyl ions attack SiO 2, causing softening and chemical dissolution (mechanism unverified) –particles range from 10 to 3000 nm, mean size 160 nm –12% (wt) particles, KOH used to set pH ~11 –other concerns: particle size distribution (scratching), particle shape, particle agglomeration

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 11 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Consumables (cont’d) Slurries for metal (W, Al, Cu) polishing –oxidants cause metal dissolution and passivation (reactions to form protective layer on metal surface) –typically alumina particles (  or  ), 100 to 2000 nm in diameter, 12% (wt) particles, pH 3 to 4 alumina-peroxide –1 part slurry, 1 part 50% H 2 O 2, pH alumina-ferric nitrate –6% alumina solids, 5% ferric nitrate, pH 1.5 alumina-potassium iodate –6% alumina solids, 2-8% potassium iodate, pH 4.0

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 12 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Consumables (cont’d) W polishing –pH 4 with H 2 O 2 or KIO 3 –pH 1.5 with ferric nitrate –pH 6 with potassium ferricyanide, potassium acid phosphate and ethylene diamine Al polishing –peroxide or iodate-based slurries Cu polishing –ammonia-based solutions, passivating agents

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 13 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Consumables (cont’d) Polish pads –cast polyurethane or felt impregnated with polyurethane, thickness~ 1-3 mm –hardness affects planarization and nonuniformity –surface treatment (conditioning) required to control polish rate and slurry transport scraping pad surface with hard edge to remove debris, open pores –pads wear out quickly ( wafers/pad!) –perforated, grooved pads coming into use (improved slurry transport/uniformity)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 14 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Consumables (cont’d) Carrier Films –hold wafers onto polish head (carrier) –porous polymeric materials held onto carrier by vacuum, thermal processing, adhesive –average roughness ~1-20 microns –compressibility range 1-25% under 10 psi load (typical of CMP conditions) –thickness ~ mm –profound effect on polishing performance

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 15 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Requirements Stable, predictable, reproducible process Removal rates >1700 Å/min for SiO 2 and >2500 Å/min for W Independent of device/circuit design, substrate –good selectivity between metal and dielectric and similar polishing rates for metals and liners Few defects (scratches, peeling, particles) Low NU –less than 5% variation in film thickness across wafer 3-6 mm edge exclusion

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 16 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Preston’s Equation Simplest CMP model Expresses polishing rate in terms of applied pressure and relative velocity between polishing pad and wafer –RR = K p PS K p = Preston coefficient (inversely proportional to elastic modulus of material being polished) P = down pressure S = pad-wafer relative speed –can predict general trends –observed RR usually proportional to P and S –cannot predict within wafer NU, feature effects, or variations due to pattern density effects

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 17 CMP Process Variables Tool –Pressure (down force) –Platen and carrier speeds –Platen temperature Slurry –Flow rate ( ml/min) –Slurry age –Temperature Pad conditioning

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 18 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Processing Problems Particle contamination on wafers –slurry particles, pad material, abraded films Chemical contamination on wafers –metal ions (K +, Fe 3+, Ni 2+ ) –anions (SiO 3 2-, WO 4 2-, IO 3 2- ) –surfactants Mechanical damage to wafers Nonuniform polishing RR variations with time during processing

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 19 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Particle Contamination Electrostatic effects can cause particles to be attracted to wafer –depends on zeta potential of particle, pH, ionic strength of solution –can be attractive or repulsive Once particles are near wafer, Van der Waals interactions (always attractive) enhance adhesion To minimize particle contamination, particle and surface must have same charge

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 20 Minimization of Particle Contamination: Additives to Alumina Slurry Isoelectric point of: Alumina8 - 9 W SiO Minimization of particulate contamination may be achieved by choosing a pH such that the surface charge (and zeta potential) of tungsten, silica, and alumina bear the same sign. Two strategies possible: –Both alumina and tungsten bear a positive surface charge (ferric nitrate based pH ) –Both alumina and tungsten are negatively charged (anionic additives such as anionic surfactants and polyanions to pH )

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 21 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Mechanical Contamination CMP can induce rearrangement of the structure of the metal or SiO 2 wafer surface Can extend tens of nm into the wafer Highly strained structures, broken networks and loss of Si atom tetrahedral coordination

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 22 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Chemical Contamination Chemicals in solution change oxidation state based on pH, potential of the solution Reactivity also changes Solubility and partitioning of chemical species can vary considerably with oxidation state and reactivity changes Corrosion may occur depending on redox potential of exposed metals (TiN-W system of concern)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 23 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Control Issues: Polishing Nonuniformities Dishing –reduction in thickness of large metal features towards the center of the features –caused by differences in polishing rates of metal, liner, and insulator Pattern erosion –thinning of oxide and metal in a patterned area –increases with pattern density Edge effect, “racetrack” NU –variations in removal rate due to stress variations with radial distance across wafer

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 24 Pattern Erosion and Large Feature Dishing Dense SRAM Array Dishing –Erosion is the thinning of oxide and metal in a patterned area, while dishing is a reduction in the thickness of a large tungsten feature toward the center of that feature. Support Circuits

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 25 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Control Issues: Removal Rate Drift As pads wear, RR decreases Occurs even with conditioning Coincident with increasing NU over time Solutions –substantial use of monitor wafers to check performance –increase polish time over time to achieve desired removal

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 26 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Post CMP Cleaning Remove particles and chemical contamination following polishing Involves buff, brush clean, megasonic clean, spin-rinse dry steps Buffing –after main polish, wafers “polished” using soft pads –used following metal CMP –oxide slurries, DI water, or NH 4 OH used changes pH of system to reduce adhesion of metal particles removes metal particles embedded in wafers –can reduce cleaning loads

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 27 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Post CMP Cleaning (cont’d) Brush cleaning –brushes made from PVA with 90% porosity –usually double sided scrubbing, roller or disk-type –brushes probably make direct contact with wafer – NH 4 OH (1-2%) added for particle removal (prevents redeposition), citric acid (0.5%) added for metal removal, HF etches oxide to remove subsurface defects Megasonic cleaning –sound waves add energy to particles, thin boundary layers –cleaning chemicals added (TMAH, SC1, etc.) –“acoustic streaming” induces flow over particles –importance uncertain

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 28 Brush Box Chemical Drip Manifold Upper Brush Assembly Lower Brush Assembly Roller Rotating Wafer Water Inlets

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 29 Double Side Scrubbing (DSS) System Configuration Wet Sand Indexer Dual Brush Module Rinse, Spin Dry Station (Megasonic) Edge Handling Receive Station User Interface (OnTrak Systems, Inc.)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 30 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Post CMP Cleaning (cont’d) Spin-rinse drying –following cleaning, wafers rotated at high speed –water and/or cleaning solution (SC1) sprayed on wafer at start –hydrodynamics drain solutions from wafer –probably no effect on cleaning, but ensures that particles dislodged from wafer during preceding steps do not resettle on wafer

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 31 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing CMP Environmental Problems Huge quantities of waste generated Polishing –consumables (slurry, pads, water, chemicals) –monitor wafers (used for testing purposes) –killed wafers –rinse water used during process Post-CMP cleaning –consumables (chemicals, water, brushes, buff pads) –post-CMP cleaning rinse water –killed wafers

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 32 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Waste Problems Slurry –solids present in waste –highly basic or acidic solutions cause pH changes in natural waters kills organisms enhances sediment dissolution, diminishes precipitation –oxidizers toxic to wildlife Rinse waters –large volumes tax wastewater treatment systems –water purification wastes are significant (ion exchange wastes, membranes, energy)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 33 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Quantities of Wastes Typical polisher processes 40 wafers/hr. with 65% overall equipment efficiency Aqueous process wastes –190 gallons slurry/day/machine –180 gallons DI rinsewater/day/machine Solid wastes –3-4 monitor wafers/pad for break in (RR drift?) –1-2 pads/machine/day (not including buff pads) Cleaning wastes –190 gallons rinsewater/day/machine –cleaning chemicals highly variable

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 34 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Subtle Concerns Energy, materials required to manufacture consumables Energy, materials required to manufacture monitor and lost wafers Long and short term environmental impacts Effects of process improvements

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 35 Evaluating Environmental Aspects of Manufacturing

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 36 The Million Dollar Questions

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 37 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing $1,000,000 Questions How does one assess environmental “soundness” of exisiting processes? –Waste Audit How does one assess environmental consequences of processes? –Environmental Impact Assessment (EIA) How does one assess and compare environmental impacts of real and proposed/improved processes? –Life Cycle Analysis (LCA)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 38 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Waste Audits - Objectives Develop understanding of the actual operating processes in a facility or unit operation Identify regions where waste is generated Guide to environmental optimization of process 6 steps

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 39 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Waste Audits (cont’d) 1) List all unit operations in process of interest CMP unit operations: –DI water preparation –slurry mixing –chemical mixing –polish tool –buff tool –wafer transport line –brush cleaning tool –megasonic tank –SRD (spin rinse dryer)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 40 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Waste Audits (cont’d) 2) Construct process flow diagrams easy for case of CMP and post-CMP cleaning 3) Determine resource usage raw materials/feeds used in each process/unit operation analysis of process specifications and actual process data many subtle materials (air, water) startup wastes

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 41 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Waste Audits (cont’d) 4) Determine storage/handling losses invoices can be compared to actual operating data spillage, spoilage, bad feed wastes identified 5) Quantify levels of waste reuse easy for CMP (none) 6) Quantify process outputs products, wastes

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 42 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Waste Audits (cont’d) Results –awareness of wastes, both obvious and hidden, in process –ability to optimize process to minimize environmental impact Questions: waste audit of CMP/post-CMP train –Where do wastes come from in CMP/post-CMP cleaning? –What could have the highest impact for reducing waste? –Would process performance be affected? –Which change could reduce the waste with the least impact?

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 43 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Environmental Impact Assessment Prioritization of concerns for environmental impacts of processes and appropriate planning to minimize impacts Required by law in U.S. for many new manufacturing projects –mandated contents –interpreted and enforced by courts –government approves or disapproves project –public can challenge in court 4 stages

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 44 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Environmental Impact Assessment (cont’d) 1) Process screening - determines which aspects of existing or planned process must be evaluated a process step that generates slurry waste may be more important that one that generates DI water waste 2) Scoping - determines key issues to be considered CMP generates basic wastewater immediate concern: effect of pH on natural waters or treatment loop long-term concern: effects of neutralization wastes

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 45 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Environmental Impact Assessment (cont’d) 3) Statement Preparation - the impact of each waste is assessed soil, water, air, wildlife, and people considered evaluated over appropriate time scales 4) External review - the community evaluates the EIA independent review by local community, government, academia –ensures that the statement is accurate, objective all EIA’s must be reviewed

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 46 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Environmental Impact Assessment (cont’d) Mandated contents of EIA: –state of present environmental condition –features of project –effects of project –ways to minimize effects –residual impacts of project Must be comprehensible to the general public

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 47 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Environmental Impact Assessment (cont’d) Criteria for choosing projects that require EIA’s: –Lists: certain types of projects always require EIAs –Project thresholds: exceeding threshold values of project cost, production, or land use can mandate EIA Sensitive area criteria - based on ability of environment to handle project and wastes Matrix criteria - all project activities and impacts listed on a matrix –activities: site investigation, preparation, construction, operation and maintenance, future and related activities –impacts: physical, chemical, ecological, aesthetic, social

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 48 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Environmental Impact Assessment (cont’d) Sensitive area criteria - based on ability of environment to handle project and wastes Matrix criteria - all project activities and impacts listed on a matrix –activities: site investigation, preparation, construction, operation and maintenance, future and related activities –impacts: physical, chemical, ecological, aesthetic, social

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 49 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Life Cycle Analysis Evaluation of entire life of a product –cycle = material acquisition to final product disposal Tool to identify and evaluate opportunities to reduce environmental impacts of products, processes, packaging, materials, and activities Important in ISO 14000, Product Stewardship 7 steps

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 50 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Life Cycle Analysis (cont’d) 1) Define scope and purpose of process 2) Set system boundaries primary systems: activities that directly contribute to making, using or disposing of a product secondary systems: auxiliary processes that contribute to making or doing something in the primary sequence Good use of LCA - to assess environmental impacts of changes in CMP processing methods Question: What is a primary, secondary and ternary process for CMP?

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 51 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Life Cycle Analysis (cont’d) 3) Inventory checklist outlines all decision areas to be considered in the analysis Guides data collection and analysis Decision areas: –purpose, system boundaries, geographic scope, types of data used, data collection or synthesis methods, data quality measures, presentation of results

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 52 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Life Cycle Analysis (cont’d) 4) Peer review guarantees validity of study internal or external reviewers financially supported by EPA possible comment areas: –scope/boundaries methodology, data acquisition/compilation methodology, validity of assumptions and results, method of communication of results

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 53 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Life Cycle Analysis (cont’d) 5) Gather data depending on scope and boundaries, may have to go all the way to raw materials acquisition for each chemical used in process remember to include data on materials required to maintain and use your product, and on the final fate of your product 6) Normalize data all data must be evaluated on a common scale (per wafer, per machine per wafer, per hour, per liter slurry...)

NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Beaudoin, et al. 54 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Life Cycle Analysis (cont’d) 7) Generate mathematical model of process allows effects of changes in operating techniques to be compared in terms of their environmental impacts Question: outline the LCA for an oxide polishing process